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參數資料
| 型號： | LTC1418ACN |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | Quad, Low Voltage, LinCMOS(TM) Differential Comparator 14-SOIC |
| 中文描述： | 1-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, PDIP28 |
| 封裝： | 0.300 INCH, PLASTIC, DIP-28 |
| 文件頁數： | 20/28頁 |
| 文件大?。?/td> | 712K |
| 代理商： | LTC1418ACN |
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20
LTC1418
APPLICATIO
S I
N
FOR
ATIO
U
W
U
RD = CONVST
CS = 0
BUSY
1418 F18
t
CONV
(SAMPLE N)
t
6
DATA (N – 1)
DB13 TO DB0
DATA
DATA N
DB13 TO DB0
DATA (N + 1)
DB13 TO DB0
DATA N
DB13 TO DB0
t
11
t
8
t
10
t
7
Figure 18. Slow Memory Mode Timing
Figure 19. ROM Mode Timing
RD = CONVST
CS = 0
(SAMPLE N)
BUSY
1418 F19
t
CONV
t
6
DATA (N – 1)
DB13 TO DB0
DATA
DATA N
DB13 TO DB0
t
10
t
11
t
8
outputs; BUSY goes high releasing the processor and the
processor takes RD (= CONVST) back high and reads the
new conversion data.
In ROM mode, the processor takes RD (= CONVST) low,
starting a conversion and reading the previous conversion
result. After the conversion is complete, the processor can
read the new result and initiate another conversion.
Serial Output Mode
Serial output mode is selected when the SER/PAR input
pin is high. In this mode, Pins 16 to 20, D0 (EXT/INT), D1
(D
OUT
), D2 (CLKOUT), D3 (SCLK) and D4 (EXTCLKIN)
assume their serial functions as shown in Figure 20.
(During this discussion these pins will be referred to by
their serial function names: EXT/INT, D
OUT
, CLKOUT,
SCLK and EXTCLKIN.) As in parallel mode, conversions
are started by a falling CONVST edge with CS low. After a
conversion is completed and the output shift register has
been updated, BUSY will go high and valid data will be
available on D
OUT
(Pin 19). This data can be clocked out
either before the next conversion starts or it can be clocked
out during the next conversion. To enable the serial data
output buffer and shift clock, CS and RD must be low.
Figure 20 shows a function block diagram of the LTC1418
in serial mode. There are two pieces to this circuitry: the
conversion clock selection circuit (EXT/INT, EXTCLKIN
and CLKOUT) and the serial port (SCLK, D
OUT
, CS and RD).
Conversion Clock Selection (Serial Mode)
In Figure 20, the conversion clock controls the internal
ADC operation. The conversion clock can be either inter-
nal or external. By connecting EXT/INT low, the internal
clock is selected. This clock generates 16 clock cycles
which feed into the SAR for each conversion.
To select an external conversion clock, tie EXT/INT high
and apply an external conversion clock to EXTCLKIN (Pin
16). (When an external shift clock (SCLK) is used during
a conversion, the SCLK should be used as the external
conversion clock to avoid the noise generated by the
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相關代理商/技術參數 |
參數描述 |
|---|---|
| LTC1418ACN#PBF | 功能描述:IC A/D CONV 14BIT SRL&PAR 28-DIP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1,000 系列:- 位數:12 采樣率（每秒）:300k 數據接口:并聯 轉換器數目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數目和類型:1 個單端，單極；1 個單端，雙極 |
| LTC1418AIG | 制造商:Linear Technology 功能描述:ADC Single SAR 200ksps 14-bit Parallel/Serial 28-Pin SSOP |
| LTC1418AIG#PBF | 功能描述:IC A/D CONV 14BIT SRL&PAR 28SSOP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1,000 系列:- 位數:12 采樣率（每秒）:300k 數據接口:并聯 轉換器數目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數目和類型:1 個單端，單極；1 個單端，雙極 |
| LTC1418AIG#TR | 功能描述:IC A/D CONV 14BIT SRL&PAR 28SSOP RoHS:否 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1,000 系列:- 位數:12 采樣率（每秒）:300k 數據接口:并聯 轉換器數目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數目和類型:1 個單端，單極；1 個單端，雙極 |
| LTC1418AIG#TRPBF | 功能描述:IC A/D CONV 14BIT SRL&PAR 28SSOP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1,000 系列:- 位數:12 采樣率（每秒）:300k 數據接口:并聯 轉換器數目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數目和類型:1 個單端，單極；1 個單端，雙極 |
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