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參數(shù)資料
| 型號： | LTC1411IG |
| 廠商： | Linear Integrated Systems |
| 元件分類： | ADC |
| 英文描述： | Single Supply 14-Bit 2.5Msps ADC |
| 中文描述： | 單電源14位2.5Msps模數(shù)轉(zhuǎn)換器 |
| 文件頁數(shù)： | 4/16頁 |
| 文件大小： | 230K |
| 代理商： | LTC1411IG |
4
LTC1411
1411f
TW U
range, otherwise specifications are T
A
= 25
°
C. (Notes 5) (See Figures 11a, 11b)
SYMBOL
PARAMETER
f
SAMPLE(MAX)
Maximum Sampling Frequency
t
CONV
Conversion Time
t
ACQ
Acquisition Time
t
0
SLP
↑
to CONVST
↓
Wake-Up Time
t
1
NAP
↑
to CONVST
↓
Wake-Up Time
t
2
CONVST
Low Time
t
3
CONVST to BUSY Delay
t
4
Data Ready After BUSY
↑
t
5
CONVST High Time
t
6
Aperture Delay of Sample-and-Hold
The
G
denotes specifications which apply over the full operating temperature
CONDITIONS
(Note 9)
MIN
2.5
TYP
MAX
UNITS
MHz
G
G
250
100
210
250
350
ns
ns
ms
ns
ns
ns
ns
ns
ns
10
μ
F Bypass Capacitor at REFCOM2 Pin
(Note 10)
C
L
= 25pF
G
20
12
7
(Note 10)
G
20
7
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
All voltage values are with respect to ground with DGND, OGND,
AVM and AGND wired together unless otherwise noted.
Note 3:
When these pin voltages are taken below AGND or above V
DD
,
they will be clamped by internal diodes. This product can handle input
currents greater than 100mA without latchup.
Note 4:
When these pin voltages are taken below AGND, they will be
clamped by internal diodes. This product can handle input currents greater
than 100mA below AGND without latchup. These pins are not clamped to
V
DD
.
Note 5:
V
DD
= 5V, PGA1 = PGA0 = 5V, f
SAMPLE
= 2.5MHz at 25
°
C and
t
r
= t
f
= 5ns unless otherwise specified.
Note 6:
Linearity, offset and full-scale specifications apply for a single-
ended A
IN+
input with A
IN–
tied to an external 2.5V reference voltage.
Note 7:
Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 8:
Bipolar offset is the offset voltage measured from –0.5LSB
when the output code flickers between 0000 0000 0000 00 and
1111 1111 1111 11.
Note 9:
Recommended operating conditions.
Note 10:
The falling CONVST edge starts a conversion. If CONVST returns
high at a critical point during the conversion it can create small errors. For
best performance ensure that CONVST returns high within 20ns after
conversion start of after BUSY rises.
Note 11:
SLP and NAP have an internal pull-down so the pins will draw
approximately 7
μ
A when tied high and less than 1
μ
A when tied low.
TYPICAL PERFOR U
Signal-to-Noise Ratio
vs Input Frequency
INPUT FREQUENCY (kHz)
10
38
32
S
50
44
62
56
100
1000
10000
1411 G01
26
20
14
86
80
74
68
INPUT FREQUENCY (kHz)
10
38
32
S
50
44
62
56
100
1000
10000
1411 G02
26
20
14
86
80
74
68
INPUT FREQUENCY (kHz)
10
–80
–90
D
–60
–70
–40
–50
100
1000
10000
1411 G03
–100
–110
0
–20
–30
–10
2ND
3RD
THD
S/(N + D) vs Input Frequency
Distortion vs Input Frequency
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