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參數(shù)資料
| 型號(hào)： | LTC1329IS8-50#TRPBF |
| 廠商： | Linear Technology |
| 文件頁(yè)數(shù)： | 6/8頁(yè) |
| 文件大小： | 0K |
| 描述： | IC D/A CONV 8BIT MICROPWR 8-SOIC |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 位數(shù)： | 8 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 840µW |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類(lèi)型： | 1 電流，單極 |
| 采樣率（每秒）： | * |
6
LTC1329-10/
LTC1329-50/LTC1329A-50
SERIAL I/O OPERATI G SEQUE CE
U
Figure 1. 3-Wire Interface Timing Specification
DIN
CLK
CS
D7
D6
D5
D4
D3
D2
D1
D0
Hi-Z
D7
′
D6
′
D5
′
D4
′
D3
′
D2
′
D1
′
D0
′
D7
tDZ
Hi-Z
1329 F01
DOUT
tDO
tCKHI
tDH
tDS
tCSS
tCKS
tCSLO
tDV
tCKLO
tCSH
tCSHI
tCKH
APPLICATIONS INFORMATION
WU
U
8-BIT CURRENT OUTPUT DAC
The LTC1329-10/LTC1329-50/LTC1329A-50 are 8-bit,
current output digital-to-analog (DAC) converters. For
each part, the 8-bit DAC output is guaranteed monotonic
and is digitally adjustable in 256 equal steps. Upon power
up, the internal DAC register resets to 10000000B and the
DAC output assumes midrange. The current output (IOUT)
can be biased from – 15V to 2V or – 15V to 2.5V in 3.3V and
5V systems, respectively. The LTC1329-10 features a full-
scale output of 10
A trimmed to ±3% at room tempera-
ture (
±5% over temperature), while the LTC1329-50
features a 50
A full scale and two accuracy grades; ±1%
at room temperature (
±2% over temperature) for the
LTC1329A-50 and
±3% at room temperature (±5% over
temperature) for the LTC1329-50. All versions include a
flexible serial digital interface which allows easy intercon-
nection to a variety of digital systems.
DIGITAL INTERFACE
Automatic Mode Selection
The LTC1329 family includes a serial interface capable of
communicating with the host system using one of three
protocols; standard 3-wire mode, a 2-wire up/down pulse
mode and a 1-wire increment-only pulse mode. The
LTC1329 family is designed to auto-configure itself de-
pending on the way data is presented to it. A diagram
illustrating this auto detection behavior is shown in Figure
2. At power-up, the interface is set to 1-wire pulse mode.
If the CS line ever goes low (as it will at the beginning of
a valid 3-wire serial transfer) the chip immediately
reconfigures itself into 3-wire mode and remains in this
mode until the next time the power is cycled. If CS stays
high, the LTC1329 family stays in pulse mode and watches
the UP/DN pin to determine whether to switch to 2-wire
mode. If UP/DN ever goes low (as it will the first time a
“down” command is given) the chip switches into 2-wire
pulse mode and remains in this mode until the next time
the power is cycled. In a properly configured 1-wire
system, CS and UP/DN will stay high continuously and the
LTC1329-10/LTC1329-50/LTC1329A-50 will remain in 1-
wire pulse mode. 2-wire pulse mode systems should give
a single “down” pulse sometime before the first data
pulses are sent to prevent the LTC1329 family from
staying in 1-wire mode if the first several pulses happen to
be “ups”.
POWER-UP
3-WIRE MODE
PULSE MODE
1329 F02
INCREMENT/
DECREMENT
INCREMENT-
ONLY
CS STAYS
HIGH
CS GOES
LOW
DIN (UP/DN)
GOES LOW
DIN STAYS
HIGH
Figure 2. LTC1329 Operating Modes
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