參數(shù)資料
型號(hào): LTC1292CIN8
廠商: Linear Technology
文件頁數(shù): 4/24頁
文件大?。?/td> 0K
描述: IC DATA ACQ SYSTEM 12BIT 8-DIP
標(biāo)準(zhǔn)包裝: 50
類型: 數(shù)據(jù)采集系統(tǒng)(DAS)
分辨率(位): 12 b
采樣率(每秒): 60k
數(shù)據(jù)接口: 串行,并聯(lián)
電壓電源: 單電源
電源電壓: 5V
工作溫度: -40°C ~ 85°C
安裝類型: 通孔
封裝/外殼: 8-DIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 8-PDIP
包裝: 管件
12
LTC1292/LTC1297
12927fb
U
S
A
O
PPLICATI
WU
U
I FOR ATIO
Figure 5. Hardware and Software Interface to Intel 8051 Processor
LABEL MNEMONIC
OPERAND
COMMENTS
MOV
P1,#02h
BIT 1 PORT 1 SET AS INPUT
CLR
P1.3
CLK GOES LOW
SETB
P1.4
CS GOES HIGH
CONT
CLR
P1.4
CS GOES LO
NOP
4 NOP FOR LTC1297 tsuCS (Wakeup
NOP
Time) (Not Needed for LTC1292)
NOP
SETB
P1.3
CLK GOES HIGH
CLR
P1.3
CLK GOES LOW
SETB
P1.3
CLK GOES HIGH
CLR
P1.3
CLK GOES LOW
MOV
R4,#08H
LOAD COUNTER
LOOP
MOV
C,P1.1
READ DATA BIT INTO CARRY
RLC
A
ROTATE DATA BIT INTO ACC
SETB
P1.3
CLK GOES HIGH
CLR
P1.3
CLK GOES LOW
DJNZ
R4,LOOP
NEXT BIT
MOV
R2,A
STORE MSBs IN R2
MOV
C,P1.1
READ DATA BIT INTO CARRY
CLR
A
CLEAR ACC
RLC
A
ROTATE DATA BIT (B3) INTO ACC
SETB
P1.3
CLK GOES HIGH
CLR
P1.3
CLK GOES LOW
MOV
C,P1.1
READ DATA BIT INTO CARRY
RLC
A
ROTATE DATA BIT (B2) INTO ACC
SETB
P1.3
CLK GOES HIGH
CLR
P1.3
CLK GOES LOW
MOV
C,P1.1
READ DATA BIT INTO CARRY
RLC
A
ROTATE DATA BIT (B1) INTO ACC
SETB
P1.3
CLK GOES HIGH
CLR
P1.3
CLK GOES LOW
MOV
C,P1.1
READ DATA BIT INTO CARRY
SETB
P1.4
CS GOES HIGH
RRC
A
ROTATE DATA BIT (B0) INTO ACC
RRC
A
ROTATE RIGHT INTO ACC
RRC
A
ROTATE RIGHT INTO ACC
RRC
A
ROTATE RIGHT INTO ACC
MOV
R3,A
STORE LSBs IN R3
AJMP
CONT
START NEXT CONVERSION
LABEL MNEMONIC
OPERAND
COMMENTS
8051 CODE
Sharing the Serial Interface
The LTC1292/LTC1297 can share the same two-wire
serial interface with other peripheral components or other
LTC1292/LTC1297s (Figure 6). In this case, the CS signals
decide which LTC1292 is being addressed by the MPU.
ANALOG CONSIDERATIONS
Grounding
The LTC1292/LTC1297 should be used with an analog
ground plane and single point grounding techniques. Do
not use wire wrapping techniques to breadboard and
evaluate the device. To achieve the optimum performance
DOUT FROM LTC1292/LTC1297 STORED IN 8051 RAM
B3
B2
B0
B1
O
OO
R3
B7
B6
B5
B4
B10
B9
B8
B11
R2
MSB
ANALOG
INPUTS
CLK
DOUT
LTC1292
LTC1297
CS
P1.4
P1.3
P1.1
8051
LTC1292/7 F05
CS
DOUT
B11
B7
B8
B9
B10
B4
B5
B6
B3
B2
B1
B0
CLK
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