參數(shù)資料
型號： LTC1290DISW#TRPBF
廠商： Linear Technology
文件頁數(shù)： 10/32頁
文件大?。?/td> 0K
描述： IC DATA ACQ SYS 12BIT 20-SOIC
標準包裝： 1,000
類型： 數(shù)據(jù)采集系統(tǒng)（DAS），ADC
分辨率（位）： 12 b
采樣率（每秒）： 50k
數(shù)據(jù)接口： 串行，并聯(lián)
電壓電源： 雙 ±
電源電壓： ±5 V，5 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 20-SOIC（0.295"，7.50mm 寬）
供應商設備封裝： 20-SOIC
包裝： 帶卷 (TR)
18
LTC1290
1290fe
U
S
A
O
PPLICATI
WU
U
I FOR ATIO
8051 Code
MNEMONIC
COMMENTS
MOV P1,#02H
Bit 1 Port 1 Set as Input
CLR P1.3
SCLK Goes Low
SETB P1.4
CS Goes High
CONT
MOV A,#0EH
DIN Word for LTC1290
CLR P1.4
CS Goes Low
MOV R4,#08H
Load Counter
NOP
Delay for Deglitcher
LOOP
MOV C,P1.1
Read Data Bit Into Carry
RLC A
Rotate Data Bit Into ACC
MOV P1.2,C
Output DIN Bit to LTC1290
SETB P1.3
SCLK Goes High
CLR P1.3
SCLK Goes Low
DJNZ R4,LOOP
Next Bit
MOV R2,A
Store MSBs in R2
MOV C,P1.1
Read Data Bit Into Carry
CLR A
Clear ACC
RLC A
Rotate Data Bit Into ACC
SETB P1.3
SCLK Goes High
CLR P1.3
SCLK Goes Low
MOV C,P1.1
Read Data Bit Into Carry
RLC A
Rotate Data Bit Into ACC
SETB P1.3
SCLK Goes High
CLR P1.3
SCLK Goes Low
MOV C,P1.1
Read Data Bit Into Carry
RLC A
Rotate Data Bit Into ACC
SETB P1.3
SCLK Goes High
CLR P1.3
SCLK Goes Low
MOV C, P1.1
Read Data Bit Into Carry
RRC A
Rotate Right Into ACC
RRC A
Rotate Right Into ACC
RRC A
Rotate Right Into ACC
RRC A
Rotate Right Into ACC
MOV R3,A
Store LSBs in R3
SETB P1.3
SCLK Goes High
CLR P1.3
SCLK Goes Low
SETB P1.4
CS Goes High
MOV R5,#0BH
Load Counter
DELAY
DJNZ R5,DELAY
Go to Delay if Not Done
8 CHANNELS
3
3-WIRE SERIAL
INTERFACE TO OTHER
PERIPHERALS OR LTC1290s
2
10
OUTPUT PORT
SERIAL DATA
MPU
LTC1290 F05
LTC1290
CS
LTC1290
CS
LTC1290
CS
Sharing the Serial Interface
The LTC1290 can share the same 3-wire serial interface
with other peripheral components or other LTC1290s (see
Figure 5). In this case, the CS signals decide which
LTC1290 is being addressed by the MPU.
ANALOG CONSIDERATIONS
1. Grounding
The LTC1290 should be used with an analog ground plane
and single point grounding techniques.
AGND (Pin 11) should be tied directly to this ground plane.
DGND (Pin 10) can also be tied directly to this ground
plane because minimal digital noise is generated within
the chip itself.
VCC (Pin 20) should be bypassed to the ground plane with
a 22
F tantalum with leads as short as possible. V– (Pin
12) should be bypassed with a 0.1
F ceramic disk. For
single supply applications, V – can be tied to the ground
plane.
It is also recommended that REF – (Pin 13) and COM (Pin
9) be tied directly to the ground plane. All analog inputs
should be referenced directly to the single point ground.
Digital inputs and outputs should be shielded from and/or
routed away from the reference and analog circuitry.
Figure 5. Several LTC1290s Sharing One 3-Wire Serial Interface
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