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參數(shù)資料
| 型號： | LTC1287CCN8 |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 10/16頁 |
| 文件大小： | 0K |
| 描述： | IC DATA ACQ SYS 12BIT 3V 8-DIP |
| 標準包裝： | 50 |
| 類型： | 數(shù)據(jù)采集系統(tǒng)（DAS） |
| 分辨率（位）： | 12 b |
| 采樣率（每秒）： | 30k |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 電壓電源： | 單電源 |
| 電源電壓： | 3V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 8-DIP（0.300"，7.62mm） |
| 供應商設(shè)備封裝： | 8-PDIP |
| 包裝： | 管件 |
LTC1287
3
1287fa
AC CHARACTERISTICS
LTC1287B/LTC1287C
ELECTRICAL C
C
HARA TER STICS
DIGITAL A D
U
I
DC
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All voltage values are with respect to ground (unless otherwise
noted).
Note 3: VCC = 3V, VREF = 2.5V, CLK = 500kHz unless otherwise specified.
Note 4: One LSB is equal to VREF divided by 4096. For example, when VREF
= 2.5V, 1LSB = 2.5V/4096 = 0.61mV.
Note 5: Integral nonlinearity error is defined as the deviation of a code
from a straight line passing through the actual endpoints of the transfer
curve. The deviation is measured from the center of the quantization band.
Note 6: Recommended operating conditions.
LTC1287B/LTC1287C
Note 7: Two on-chip diodes are tied to each analog input which will
conduct for analog voltages one diode drop below GND or one diode drop
above VCC. Be careful during testing at low VCC levels, as high level analog
inputs can cause this input diode to conduct, especially at elevated
temperature, and cause errors for inputs near full scale. This spec allows
50mV forward bias of either diode. This means that as long as the analog
input does not exceed the supply voltage by more than 50mV, the output
code will be correct.
Note 8: Channel leakage current is measured after the channel selection.
Note 9: Increased leakage currents at elevated temperatures cause the
S/H to droop, therefore it is recommended that fCLK ≥ 30kHz at 85°C and
fCLK ≥ 3kHz at 25°C.
The q denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at TA = 25°C. (Note 3)
The q denotes the specifications which
apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
thDO
Time Output Data Remains Valid After CLK
↓
50
ns
tf
DOUT Fall Time
See Test Circuits
q
40
100
ns
tr
DOUT Rise Time
See Test Circuits
q
40
100
ns
tWHCLK
CLK High Time
VCC = 3V (Note 6)
600
ns
tWLCLK
CLK Low Time
VCC = 3V (Note 6)
800
ns
tsuCS
Setup Time, CS
↓ Before CLK↑
VCC = 3V (Note 6)
100
ns
tWHCS
CS High Time Between Data Transfer Cycles
VCC = 3V (Note 6)
5.0
s
tWLCS
CS Low Time During Data Transfer
VCC = 3V (Note 6)
14
CLK Cycles
CIN
Input Capacitance
Analog Inputs On Channel
100
pF
Analog Inputs Off Channel
5
pF
Digital Inputs
5
pF
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VIH
High Level Input Voltage
VCC = 3.6V
q
2.1
V
VIL
Low Level Input Voltage
VCC = 3.0V
q
0.45
V
IIH
High Level Input Current
VIN = VCC
q
2.5
A
IIL
Low Level Input Current
VIN = 0V
q
–2.5
A
VOH
High Level Output Voltage
VCC = 3.0V, IO = 20A
2.90
V
IO = 400A
q
2.7
2.85
V
VOL
Low Level Output Voltage
VCC = 3.0V, IO = 20A
0.05
V
IO = 400A
q
0.10
0.3
V
IOZ
High Z Output Leakage
VOUT = VCC, CS High
q
3
A
VOUT = 0V, CS High
q
–3
A
ISOURCE
Output Source Current
VOUT = 0V
–10
mA
ISINK
Output Sink Current
VOUT = VCC
9mA
ICC
Positive Supply Current
CS High
q
1.5
5
mA
IREF
Reference Current
VREF = 2.5V
q
10
50
A
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