參數(shù)資料
型號: LTC1285CS8
廠商: LINEAR TECHNOLOGY CORP
元件分類: ADC
英文描述: 3V Micropower Sampling 12-Bit A/D Converters in SO-8 Packages
中文描述: 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO8
封裝: 0.150 INCH, PLASTIC, SO-8
文件頁數(shù): 13/24頁
文件大?。?/td> 412K
代理商: LTC1285CS8
13
LTC1285/LTC1288
APPLICATIO
I
N
FOR
ATIO
U
Transfer Curve
The LTC1285/LTC1288 are permanently configured for
unipolar only. The input span and code assignment for
this conversion type are shown in the following figures.
W
U
0
1
V
R
V
REF
4096
V
R
V
R
V
IN
0 0 0 0 0 0 0 0 0 0 0 1
0 0 0 0 0 0 0 0 0 0 0 0
1 1 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1 1 0
LTC1285/88 AI04
1LSB =
Transfer Curve
OUTPUT CODE
0 0 0 0 0 0 0 0 0 0 0 0 0 1
0 0 0 0 0 0 0 0 0 0 0 0 0 0
1 1 1 1 1 1 1
1 1 1 1 1 1
INPUT VOLTAGE
V
REF
– 1LSB
V
REF
– 2LSB
1LSB
0V
INPUT VOLTAGE
(V
REF
= 5.000V)
4.99878V
4.99756V
0.00122V
0V
LTC1285/88 AI05
Output Code
Operation with D
IN
and D
OUT
Tied Together
The LTC1288 can be operated with D
IN
and D
OUT
tied
together. This eliminates one of the lines required to
communicate to the microprocessor (MPU). Data is trans-
mitted in both directions on a single wire. The processor
pin connected to this data line should be configurable as
either an input or an output. The LTC1288 will take control
of the data line and drive it low on the 4th falling CLK edge
after the start bit is received (see Figure 3). Therefore the
processor port line must be switched to an input before
this happens to avoid a conflict.
In the Typical Applications section, there is an example of
interfacing the LTC1288 with D
IN
and D
OUT
tied together to
the Intel 8051 MPU.
ACHIEVING MICROPOWER PERFORMANCE
With typical operating currents of 160
μ
A and automatic
shutdown between conversions, the LTC1285/LTC1288
achieves extremely low power consumption over a wide
range of sample rates (see Figure 4). The auto-shutdown
allows the supply curve to drop with reduced sample rate.
Figure 3. LTC1288 Operation with D
IN
and D
OUT
Tied Together
1
2
3
4
CS
CLK
DATA
(D
IN
/D
OUT
)
START
SGL/DIFF
ODD/SIGN
MSBF
B11
B10
MSBF BIT LATCHED
BY LTC1288
LTC1288 CONTROLS DATA LINE AND SENDS
A/D RESULT BACK TO MPU
LTC1288 TAKES CONTROL OF DATA LINE
ON 4TH FALLING CLK
MPU CONTROLS DATA LINE AND SENDS
MUX ADDRESS TO LTC1288
PROCESSOR MUST RELEASE DATA LINE AFTER
4TH RISING CLK AND BEFORE THE 4TH FALLING CLK
LTC1285/88 F03
SAMPLE FREQUENCY (kHz)
0.1
1
S
μ
A
10
100
1000
1
10
100
LTC1285/88 F04
T
A
= 25°C
V
CC
= 2.7V
V
REF
= 2.5V
f
CLK
= 120kHz
Figure 4. Automatic Power Shutdown Between Conversions
Allows Power Consumption to Drop with Sample Rate
相關(guān)PDF資料
PDF描述
LTC1288 Single Channel Codec-Bandwidth Independent of Sampling Rate 28-PLCC 0 to 70
LTC1288CS8 3V Micropower Sampling 12-Bit A/D Converters in SO-8 Packages
LTC1289BC 3 Volt Single Chip 12-Bit Data Acquisition System
LTC1289CCJ 3 Volt Single Chip 12-Bit Data Acquisition System
LTC1289CCN 3 Volt Single Chip 12-Bit Data Acquisition System
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