參數資料
型號: LTC1098AIN8#PBF
廠商: LINEAR TECHNOLOGY CORP
元件分類: ADC
英文描述: 2-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDIP8
封裝: 0.300 INCH, PLASTIC, DIP-8
文件頁數: 2/28頁
文件大小: 368K
代理商: LTC1098AIN8#PBF
10
LTC1096/LTC1096L
LTC1098/LTC1098L
W
I
DAGRA
BLOCK
PI FU CTIO S
U
UU
LTC1096/LTC1096L
CS/SHDN (Pin 1): Chip Select Input. A logic low on this
input enables the LTC1096/LTC1096L. A logic high on this
input disables the LTC1096/LTC1096L and disconnects
the power to the LTC1096/LTC1096L.
IN+ (Pin 2): Analog Input. This input must be free of noise
with respect to GND.
IN(Pin 3): Analog Input. This input must be free of noise
with respect to GND.
GND (Pin 4): Analog Ground. GND should be tied directly
to an analog ground plane.
VREF (Pin 5): Reference Input. The reference input defines
the span of the A/D converter and must be kept free of
noise with respect to GND.
DOUT (Pin 6): Digital Data Output. The A/D conversion
result is shifted out of this output.
CLK (Pin 7): Shift Clock. This clock synchronizes the serial
data transfer.
VCC (Pin 8): Power Supply Voltage. This pin provides
power to the A/D converter. It must be free of noise and
ripple by bypassing directly to the analog ground plane.
LTC1098/LTC1098L
CS/SHDN (Pin 1): Chip Select Input. A logic low on this
input enables the LTC1098/LTC1098L. A logic high on this
input disables the LTC1098/LTC1098L and disconnects
the power to the LTC1098/LTC1098L.
CH0 (Pin 2): Analog Input. This input must be free of noise
with respect to GND.
CH1 (Pin 3): Analog Input. This input must be free of noise
with respect to GND.
GND (Pin 4): Analog Ground. GND should be tied directly
to an analog ground plane.
DIN (Pin 5): Digital Data Input. The multiplexer address is
shifted into this pin.
DOUT (Pin 6): Digital Data Output. The A/D conversion
result is shifted out of this output.
CLK (Pin 7): Shift Clock. This clock synchronizes the serial
data transfer.
VCC (VREF)(Pin 8): Power Supply Voltage. This pin pro-
vides power and defines the span of the A/D converter. It
must be free of noise and ripple by bypassing directly to
the analog ground plane.
+
CSAMPLE
BIAS AND
SHUTDOWN CIRCUIT
SERIAL PORT
VCC (VCC/VREF)
CS
CLK
DOUT
IN+ (CH0)
IN(CH1)
MICROPOWER
COMPARATOR
CAPACITIVE DAC
SAR
VREF
GND
PIN NAMES IN PARENTHESES
REFER TO THE LTC1098/LTC1098L
(DIN)
LTC1096/LTC1096L
相關PDF資料
PDF描述
LTC1098AIS8#PBF 2-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO8
LTC1098CS8-3 2-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO8
LTC1096IS8-3 1-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO8
LTC1098ACS8-3 2-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO8
LTC1098AIS8-3 2-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO8
相關代理商/技術參數
參數描述
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LTC1098CN8PBF 制造商:Linear Technology 功能描述:LTC1098CN8PBF