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參數(shù)資料
| 型號： | LTC1093CSW#TR |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 18/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DATA ACQ SYS 10BIT 6CH 16SOIC |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類型： | 數(shù)據(jù)采集系統(tǒng)（DAS），ADC |
| 分辨率（位）： | 10 b |
| 數(shù)據(jù)接口： | 串行 |
| 電壓電源： | 雙 ± |
| 電源電壓： | ±5V，4.5V，10V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC |
| 包裝： | 帶卷 (TR) |
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25
LTC1091/LTC1092
LTC1093/LTC1094
U
S
A
O
PPLICATI
WU
U
I FOR ATIO
0.5mV/DIV
1
s/DIV
1091-4 F14
Figure 14. Poor Reference Settling Can Cause A/D Errors
6. Reduced Reference Operation
The minimum reference voltage of the LTC1091 is limited
to 4.5V because the VCC supply and reference are internally
tied together. However, the LTC1092/LTC1093/LTC1094
can operate with reference voltages below 1V.
The effective resolution of the LTC1092/LTC1093/LTC1094
can be increased by reducing the input span of the con-
verter. The parts exhibit good linearity and gain over a wide
range of reference voltages (see typical curves of Linearity
and Full-Scale Error vs Reference Voltage). However, care
must be taken when operating at low values of VREF
because of the reduced LSB step size and the resulting
higher accuracy requirement placed on the converter. The
following factors must be considered when operating at
low VREF values:
1. Offset
2. Noise
3. Conversion speed (CLK frequency)
Offset with Reduced VREF
The offset of the LTC1092/LTC1093/LTC1094 has a larger
effect on the output code when the A/D is operated with
reduced reference voltage. The offset (which is typically a
fixed voltage) becomes a larger fraction of an LSB as the
size of the LSB is reduced. The typical curve of Unadjusted
Offset Error vs Reference Voltage shows how offset in
LSBs is related to reference voltage for a typical value of
VOS. For example, a VOS of 0.5mV which is 0.1LSB with a
5V reference becomes 0.5LSB with a 1V reference and
2.5LSBs with a 0.2V reference. If this offset is unaccept-
able, it can be corrected digitally by the receiving system
or by offsetting the “–” input to the LTC1092/LTC1093/
LTC1094.
Noise with Reduced VREF
The total input-referred noise of the LTC1092/LTC1093/
LTC1094 can be reduced to approximately 200
Vpeak-to-
peak using a ground plane, good bypassing, good layout
techniques and minimizing noise on the reference inputs.
This noise is insignificant with a 5V reference but will
become a larger fraction of an LSB as the size of the LSB
is reduced. The typical curve of Noise Error vs Reference
Voltage shows the LSB contribution of this 200
V of
noise.
For operation with a 5V reference, the 200
V noise is only
0.04LSB peak-to-peak. In this case, the LTC1092/LTC1093/
LTC1094 noise will contribute virtually no uncertainty to
the output code. However, for reduced references, the
noise may become a significant fraction of an LSB and
cause undesirable jitter in the output code. For example,
with a 1V reference, this same 200
V noise is 0.2LSB
peak-to-peak. This will reduce the range of input voltages
over which a stable output code can be achieved by
0.2LSB. If the reference is further reduced to 200mV, the
200
V noise becomes equal to one LSB and a stable code
may be difficult to achieve. In this case averaging readings
may be necessary.
This noise data was taken in a very clean setup. Any setup-
induced noise (noise or ripple on VCC, VREF, VIN or V–) will
add to the internal noise. The lower the reference voltage
to be used, the more critical it becomes to have a clean,
noise-free setup.
Conversion Speed with Reduced VREF
With reduced reference voltages, the LSB step size is
reduced and the LTC1092/LTC1093/LTC1094 internal
comparator overdrive is reduced. Therefore, it may be
necessary to reduce the maximum CLK frequency when
low values of VREF are used.
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相關(guān)代理商/技術(shù)參數(shù) |
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| LTC1093MJ | 制造商:Linear Technology 功能描述:Single ADC SAR 26ksps 10-bit Serial 16-Pin CDIP |
| LTC1094 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:1-, 2-, 6- and 8-Channel, 10-Bit Serial I/O Data Acquisition Systems |
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| LTC1094ACN | 功能描述:IC DATA ACQ SYS 10BIT 8CH 20-DIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 類型:數(shù)據(jù)采集系統(tǒng)（DAS） 分辨率（位）:16 b 采樣率（每秒）:21.94k 數(shù)據(jù)接口:MICROWIRE?，QSPI?，串行，SPI? 電壓電源:模擬和數(shù)字 電源電壓:1.8 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:40-TQFN-EP（6x6） 包裝:托盤 |
| LTC1094ACN#PBF | 功能描述:IC DATA ACQ SYS 10BIT 8CH 20-DIP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 類型:數(shù)據(jù)采集系統(tǒng)（DAS） 分辨率（位）:16 b 采樣率（每秒）:21.94k 數(shù)據(jù)接口:MICROWIRE?，QSPI?，串行，SPI? 電壓電源:模擬和數(shù)字 電源電壓:1.8 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:40-TQFN-EP（6x6） 包裝:托盤 |
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