參數(shù)資料
型號: LTC1090CSW
廠商: LINEAR TECHNOLOGY CORP
元件分類: ADC
英文描述: Single Chip 10-Bit Data Acquisition System
中文描述: 8-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20
封裝: 0.300 INCH, PLASTIC, SO-20
文件頁數(shù): 16/28頁
文件大?。?/td> 344K
代理商: LTC1090CSW
16
LTC1090
1090fc
Motorola SPI (MC68HC05C4)
The MC68HC05C4 transfers data MSB first and in 8-bit
increments. Programming the LTC1090 for MSB first
format and 16-bit word length allows the 10-bit data
output to be received by the MPU as two 8-bit bytes with
the final 6 unused bits filled with zeroes by the LTC1090.
Hardware and Software Interface to Motorola MC68HC05C4
Processor
Hitachi Synchronous SCI (HD63705)
The HD63705 transfers serial data in 8-bit increments,
LSB first. To accommodate this, the LTC1090 is
programmed for 16-bit word length and LSB first format.
The 10-bit output data is received by the processor as two
8-bit bytes, LSB first. The LTC1090 fills the final 6 unused
bits (after the MSB) with zeroes in unipolar mode and with
the sign bit in bipolar mode.
Hardware and Software Interface to Hitachi HD63705 Processor
APPLICATIOU
W
U
U
MNEMONIC
DESCRIPTION
BCLR n
LDA
STA
NOP
LDA
LDA
STA
STA
NOP
BSET n
LDA
LDA
STA
C0 is cleared (CS goes Low)
Load D
IN
for LTC1090 into ACC
Load D
IN
from ACC to SPI data reg. Start SCK
8 NOPs for timing
Load contents of SPI status reg. into ACC
Load LTC1090 D
OUT
from SPI data reg. into ACC (byte 1)
Load LTC1090 D
OUT
into RAM (location A)
Start next SPl cycle
6 NOPs for timing
C0 is set (CS goes high)
Load contents of SPI status reg. into ACC
Load LTC1090 D
OUT
from SPI data reg. into ACC (byte 2)
Load LTC1090 D
OUT
into RAM (location A + 1)
LTC1090
ANALOG
INPUTS
D
OUT
D
OUT
from LTC1090 stored in MC68HCO5C4 RAM
MSB*
B8 B7 B6 B5 B4 B3 B2
D
IN
SCLK
CO
SCK
MOSI
MISO
MC68HCO5C4
CS
B9
Location A
Location A + 1
byte 1
byte 2
*B9 is MSB in unipolar or sign bit in bipolar
LSB
B1 B0
0
0
0
0
0
0
LTC1090 AI12
MNEMONIC
DESCRIPTION
LDA
BCLR n
STA
Load D
IN
word for LTC1090 into ACC from RAM
C0 cleared (CS goes low)
Load D
IN
word for LTC1090 into SCI data reg. from ACC
and start clocking data (LSB first)
NOP
LDA
6 NOPs for timing
Load contents of SCI data reg. into ACC (byte 1)
Start next SCI cycle
Load LTC1090 D
OUT
word into RAM (Location A)
Timing
C0 set (CS goes high)
Load contents of SCI data reg. into ACC (byte 2)
Load LTC1090 D
OUT
word into RAM (Location A + 1)
STA
NOP
BSET n
LDA
STA
LTC1090
ANALOG
INPUTS
D
OUT
D
OUT
from LTC1090 stored in HD63705 RAM
D
IN
SCLK
C0
CK
T
X
R
X
HD63705
CS
B7
Sign
B9 B9 B9 B9 B9 B9 B9 B8
Location A
Location A + 1
Bipolar
byte 1
byte 2
LSB
B6 B5 B4 B3 B2 B1 B0
LTC1090 AI13
B7
Location A
Location A + 1
Unipolar
byte 1
byte 2
LSB
MSB
0 B9 B8
B6 B5 B4 B3 B2 B1 B0
0
0
0
0
0
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