參數(shù)資料
型號(hào): LTC1065MJ8
廠商: LINEAR TECHNOLOGY CORP
元件分類: 運(yùn)動(dòng)控制電子
英文描述: DC Accurate, Clock-Tunable Linear Phase 5th Order Bessel Lowpass Filter
中文描述: SWITCHED CAPACITOR FILTER, BESSEL, LOWPASS, CDIP8
封裝: 0.300 INCH, HERMETIC SEALED, CERAMIC, DIP-8
文件頁數(shù): 8/12頁
文件大?。?/td> 314K
代理商: LTC1065MJ8
8
LTC1065
TEST CIRCUIT
V
50k
V
+
0.1
μ
F
V
OUT
1065 TC01
0.1
μ
F
CLOCK IN
+
LT1022
20pF
V
IN
50k
8
7
6
5
1
2
3
4
LTC1065
Figure 3. Test Circuit for THD
Self-Clocking Operation
The LTC1065 features an internal oscillator which can be
tuned via an external RC. The LTC1065’s internal oscillator
is primarily intended for generation of clock frequencies
below 500kHz. The first curve of the Typical Performance
Characteristics section shows how to quickly choose the
value of the RC for a given frequency. More precisely, the
frequency of the internal oscillator is equal to:
f
CLK
= K/RC
For clock frequencies (f
CLK
) below 100kHz, K equals 1.07.
Figure 4b shows the variation of the parameter K versus
clock frequency and power supply. First choose the de-
sired clock frequency (f
CLK
< 500kHz), then through Figure
4b pick the right value of K, set C = 200pF and solve for R.
Example 1: f
CUTOFF
= 2kHz, f
CLK
= 200kHz, V
S
=
±
5V,
T
A
= 25
°
C, K = 1.0, C = 200pF
then,
R = (1.0)/(200kHz
×
204pF) = 24.5k.
U
S
A
O
PPLICATI
U
U
Figure 4a.
V
IN
R
V
OUT
1065 F04a
C
V
V
+
1
2
3
4
8
7
6
5
LTC1065
Figure 4b. f
CLK
vs K
INTERNAL CLOCK FREQUENCY (kHz)
K
1.25
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
0.75
1065 F04b
100
300
500
V
S
= ±7.5V
V
S
= ±2.5V
f
= K/RC
C = 200pF
T
A
= 25°C
V
S
= ±5V
200
400
Note a 4pF parasitic capacitance is assumed in parallel
with the external 200pF timing capacitor. Figure 5 shows
the clock frequency variation from –40
°
C to 85
°
C. The
200kHz clock of Example 1 will change by –1.75% at 85
°
C.
For a limited temperature range, the internal oscillator of
the LTC1065 can be used to generate clock frequencies
above 500kHz (Figures 6 and 7). The data of Figure 6 is
derived from several devices. For a given external (RC)
value, the observed device-to-device clock frequency varia-
tion was
±
1% (V
S
=
±
5V), and
±
1.25% for V
S
=
±
2.5V.
Example 2:
f
CUTOFF
= 20kHz, f
CLK
= 2MHz, V
S
=
±
7.5V,
T
A
= 25
°
C, C = 10pF
from Figure 6, K = 0.575,
and,
R = (0.575)/(2MHz
×
14pF) = 20.5k.
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