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參數(shù)資料
| 型號： | LTC1060CSW#TR |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 11/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC BUILDING BLK DUAL FLTR 20SOIC |
| 標準包裝： | 1,000 |
| 濾波器類型： | 通用開關電容器 |
| 頻率 - 截止或中心： | 30kHz |
| 濾波器數(shù)： | 2 |
| 濾波器階數(shù)： | 4th |
| 電源電壓： | ±2.37 V ~ 5 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SOIC（0.295"，7.50mm 寬） |
| 供應商設備封裝： | 20-SOIC |
| 包裝： | 帶卷 (TR) |
19
LTC1060
1060fb
Output Offsets
The DC offset at the filter bandpass output is always equal
to VOS3. The DC offsets at the remaining two outputs
(Notch and LP) depend on the mode of operation and
external resistor ratios. Table 5 illustrates this.
It is important to know the value of the DC output offsets,
especially when the filter handles input signals with large
dynamic range. As a rule of thumb, the output DC offsets
increase when:
1. The Q’s decrease.
2. The ratio (fCLK/f0) increases beyond 100:1. This is
done by decreasing either the (R2/R4) or the
R6/(R5 + R6) resistor ratios.
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
N Package
20-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
LTC1060 OFFSETS
U
PACKAGE DESCRIPTIO
.255 ± .015*
(6.477 ± 0.381)
1.040*
(26.416)
MAX
12
3
4
5
6
7
8
910
19
11
12
13
14
16
15
17
18
20
NOTE:
1. DIMENSIONS ARE
INCHES
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
N20 1002
.020
(0.508)
MIN
.120
(3.048)
MIN
.125 – .145
(3.175 – 3.683)
.065
(1.651)
TYP
.045 – .065
(1.143 – 1.651)
.018 ± .003
(0.457 ± 0.076)
.005
(0.127)
MIN
.100
(2.54)
BSC
.008 – .015
(0.203 – 0.381)
.300 – .325
(7.620 – 8.255)
.325
+.035
–.015
+0.889
–0.381
8.255
()
Table 5
VOSN
VOSBP
VOSLP
MODE
PIN 3 (18)
PIN 2 (19)
PIN 1 (20)
1,4
VOS1 [(1/Q) + 1 + ||HOLP||] – VOS3/Q
VOS3
VOSN – VOS2
1a
VOS1 [1 + (1/Q)] – VOS3/Q
VOS3
VOSN – VOS2
1b
VOS1 [(1/Q) + 1 + R2/R1] – VOS3/Q
VOS3
~ (VOSN – VOS2) (1 + R5/R6)
1c
VOS1 [(1/Q) + 1 + R2/R1] – VOS3/Q
VOS3
(R5 + R6)
(R5 + 2R6)
~(VOSN – VOS2)
2, 5
[VOS1(1 + R2/R1 + R2/R3 + R2/R4) – VOS3(R2/R3)]
VOS3
VOSN – VOS2
[R4/(R2 + R4)] + VOS2[R2/(R2 + R4)]
2a
VOS3
(R5 + R6)
(R5 + 2R6)
~(VOSN – VOS2)
2b
VOS3
~ (VOSN – VOS2) (1 + R5/R6)
3, 4a
VOS2
VOS3
R4
R1
VOS1 1 +
– VOS2
+
R4
R2
+
R4
R3
R4
R2
– VOS3
R4
R3
R4(1 + k)
R2 + R4(1 + k)
+ VOS2
;k =
R2
R2 + R4(1 + k)
R6
R5 + R6
[VOS1(1 + R2/R1 + R2/R3 + R2/R4) – VOS3(R2/R3)]
R4k
R2 + R4k
+ VOS2
;k =
R2
R2 + R4k
R6
R5 + R6
[VOS1(1 + R2/R1 + R2/R3 + R2/R4) – VOS3(R2/R3)]
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