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參數(shù)資料
| 型號： | LT6600CS8-20#TR |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 12/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AMP DIFF LP FLTR 20MHZ 8-SOIC |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 放大器類型： | 差分 |
| 電路數(shù)： | 1 |
| 輸出類型： | 差分 |
| 電流 - 輸入偏壓： | 50µA |
| 電壓 - 輸入偏移： | 10000µV |
| 電流 - 電源： | 46mA |
| 電壓 - 電源，單路/雙路(±)： | 3 V ~ 11 V，±1.5 V ~ 5.5 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SO |
| 包裝： | 帶卷 (TR) |
LT6600-20
9
66002fb
APPLICATIONS INFORMATION
place well before the output stage of the lter reaches the
supply rails, the input/output behavior of the IC shown
in Figure 6 is relatively independent of the power supply
voltage.
The two ampliers inside the LT6600-20 have indepen-
dent control of their output common mode voltage (see
the Block Diagram section). The following guidelines will
optimize the performance of the lter.
Pin 7 must be bypassed to an AC ground with a 0.01μF or
larger capacitor. Pin 7 can be driven from a low impedance
source, provided it remains at least 1.5V above V– and at
least 1.5V below V+. An internal resistor divider sets the
voltage of Pin 7. While the internal 11k resistors are well
matched, their absolute value can vary by ±20%. This
should be taken into consideration when connecting an
external resistor network to alter the voltage of Pin 7.
Pin 2 can be shorted to Pin 7 for simplicity. If a different
common mode output voltage is required, connect Pin 2
to a voltage source or resistor network. For 3V and 3.3V
supplies the voltage at Pin 2 must be less than or equal to
the mid supply level. For example, voltage (Pin 2)≤1.65V
on a single 3.3V supply. For power supply voltages higher
than 3.3V the voltage at Pin 2 should be within the voltage
of Pin 7 – 1V to the voltage of Pin 7 + 2V. Pin 2 is a high
impedance input.
The LT6600-20 was designed to process a variety of input
signals including signals centered around the mid-sup-
ply voltage and signals that swing between ground and
a positive voltage in a single supply system (Figure 1).
The range of allowable input common mode voltage (the
average of VIN+ and VIN– in Figure 1) is determined by
the power supply level and gain setting (see Distortion
vs Input Common Mode Level in the Typical Performance
Characteristics section).
Common Mode DC Currents
In applications like Figure 1 and Figure 3 where the
LT6600-20 not only provides lowpass ltering but also level
shifts the common mode voltage of the input signal, DC
currents will be generated through the DC path between
input and output terminals. Minimize these currents to
decrease power dissipation and distortion.
Consider the application in Figure 3. Pin 7 sets the output
common mode voltage of the 1st differential amplier inside
the LT6600-20 (see the Block Diagram section) at 2.5V.
Since the input common mode voltage is near 0V, there
will be approximately a total of 2.5V drop across the series
combination of the internal 402Ω feedback resistor and the
external 100Ω input resistor. The resulting 5mA common
mode DC current in each input path, must be absorbed by
the sources VIN+ and VIN–. Pin 2 sets the common mode
output voltage of the 2nd differential amplier inside the
LT6600-20, and therefore sets the common mode output
voltage of the lter. Since, in the example of Figure 3, Pin 2
differs from Pin 7 by 0.5V, an additional 2.5mA (1.25mA
per side) of DC current will ow in the resistors coupling
the 1st differential amplier output stage to lter output.
Thus, a total of 12.5mA is used to translate the common
mode voltages.
A simple modication to Figure 3 will reduce the DC com-
mon mode currents by 36%. If Pin 7 is shorted to Pin 2 the
common mode output voltage of both op amp stages will
be 2V and the resulting DC current will be 8mA. Of course,
by AC coupling the inputs of Figure 3, the common mode
DC current can be reduced to 2.5mA.
Figure 6. Output Level vs Input Level,
Differential 1MHz Input, Gain = 1
1MHz INPUT LEVEL (VP-P)
0
20
0
–20
–40
–60
–80
–100
–120
35
66002 F06
12
46
7
OUTPUT
LEVEL
(dBV)
3RD HARMONIC
85°C
1dB PASSBAND GAIN
COMPRESSION POINTS
1MHz 25°C
1MHz 85°C
3RD HARMONIC
25°C
2ND HARMONIC
25°C
2ND HARMONIC
85°C
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| LT6600CS8-5 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:Very Low Noise, Differential Amplifi er and 5MHz Lowpass Filter |
| LT6600CS8-5#PBF | 功能描述:IC AMP DIFF LP FLTR 5MHZ 8-SOIC RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 放大器類型:通用 電路數(shù):1 輸出類型:- 轉(zhuǎn)換速率:0.2 V/µs 增益帶寬積:- -3db帶寬:- 電流 - 輸入偏壓:100pA 電壓 - 輸入偏移:30µV 電流 - 電源:380µA 電流 - 輸出 / 通道:- 電壓 - 電源，單路/雙路(±):±2 V ~ 18 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SO 包裝:管件 |
| LT6600CS8-5#TRPBF | 功能描述:IC AMP DIFF LP FLTR 5MHZ 8-SOIC RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標(biāo)準(zhǔn)包裝:50 系列:- 放大器類型:J-FET 電路數(shù):2 輸出類型:- 轉(zhuǎn)換速率:3.5 V/µs 增益帶寬積:1MHz -3db帶寬:- 電流 - 輸入偏壓:30pA 電壓 - 輸入偏移:2000µV 電流 - 電源:200µA 電流 - 輸出 / 通道:- 電壓 - 電源，單路/雙路(±):7 V ~ 36 V，±3.5 V ~ 18 V 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:8-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:8-PDIP 包裝:管件 |
| LT6600CS8-5PBF | 制造商:Linear Technology 功能描述:Differential Amp 5MHz LP Filter SOIC8 |
| LT6600CS8-5-PBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:Very Low Noise, Differential Amplifi er and 5MHz Lowpass Filter |
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