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參數(shù)資料
| 型號： | LT6411IUD#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 4/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC DRVR/GAIN AMP 16-QFN |
| 標準包裝： | 121 |
| 放大器類型： | 通用 |
| 電路數(shù)： | 2 |
| 輸出類型： | 差分 |
| 轉(zhuǎn)換速率： | 3300 V/µs |
| -3db帶寬： | 650MHz |
| 電流 - 輸入偏壓： | 17µA |
| 電壓 - 輸入偏移： | 3000µV |
| 電流 - 電源： | 8mA |
| 電流 - 輸出 / 通道： | 105mA |
| 電壓 - 電源，單路/雙路(±)： | 4.5 V ~ 12 V，±2.25 V ~ 6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 16-QFN-EP（3x3） |
| 包裝： | 管件 |
LT6411
12
6411f
APPLICATIONS INFORMATION
Layout and Grounding
It is imperative that care is taken in PCB layout in order
to utilize the very high speed and very low crosstalk of
the LT6411. Separate power and ground planes are highly
recommended and trace lengths should be kept as short
as possible. If input or output traces must be run over a
distance of several centimeters, they should use a controlled
impedance with matching series and shunt resistances to
maintain signal delity.
Series termination resistors should be placed as close to
the output pins as possible to minimize output capacitance.
See the Typical Performance Characteristics section for
a plot of frequency response with various output capaci-
tors—only 12pF of parasitic output capacitance causes
6dB of peaking in the frequency response!
Low ESL/ESR bypass capacitors should be placed as close
to the positive and negative supply pins as possible. One
4700pF ceramic capacitor is recommended for both VCC
and VEE. Additional 470pF ceramic capacitors with minimal
trace length on each supply pin will further improve AC
and transient response as well as channel isolation. For
high current drive and large-signal transient applications,
additional 1F to 10F tantalums should be added on each
supply. The smallest value capacitors should be placed
closest to the LT6411 package.
If the undriven input pins are not connected directly to a low
impedance ground plane, they must be carefully bypassed
to maintain minimal impedance over frequency. Although
crosstalk will be very dependent on the board layout, a
recommended starting point for bypass capacitors would
be 470pF as close as possible to each input pin with one
4700pF capacitor in parallel.
To maintain the LT6411’s channel isolation, it is benecial
to shield parallel input and output traces using a ground
plane or power supply traces. Vias between topside
and backside metal may be required to maintain a low
inductance ground near the part where numerous traces
converge.
ESD Protection
The LT6411 has reverse-biased ESD protection diodes
on all pins. If any pins are forced a diode drop above the
positive supply or a diode drop below the negative sup-
ply, large currents may ow through these diodes. If the
current is kept below 10mA, no damage to the devices
will occur.
Single-Ended to Differential Converter
Because the gains of each channel of the LT6411 can
be congured independently, the LT6411 can be used to
provide a gain of +2 when amplifying differential signals
and when converting single-ended signals to differential.
With both channels connected to a single-ended input,
one channel congured with a gain of +1 and the other
congured with a gain of –1, the output will be a differential
version of the input with twice the peak-to-peak (differential)
amplitude. Figure 8 shows the proper connections and
Figure 9 displays the resulting performance when driv-
ing an LTC2249. This conguration can preserve signal
amplitude when converting single ended video signals to
differential signals when driving double terminated cables.
The 10k resistors in Figure 8 set the common mode volt-
age at the output.
Figure 8. Single-Ended to Differential Converter
with Gain of +2 and Common Mode Control
TYPICAL APPLICATIONS
5V
VCC
VEE
DGND
EN
LT6411
OUT1
370
370
370
370
OUT2
6411 F08
OUT+
OUT–
IN1+
IN1–
INPUT
1
F
IN2–
IN2+
10k
0.1
F
+
–
10k
5V
VCM
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