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參數(shù)資料
| 型號： | LT6402IUD-6#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 3/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DIFF AMP/ADC DRVR 16-QFN |
| 標(biāo)準(zhǔn)包裝： | 121 |
| 放大器類型： | 差分 |
| 電路數(shù)： | 2 |
| 輸出類型： | 差分 |
| 轉(zhuǎn)換速率： | 400 V/µs |
| -3db帶寬： | 300MHz |
| 電流 - 輸入偏壓： | 5µA |
| 電壓 - 輸入偏移： | 1000µV |
| 電流 - 電源： | 30mA |
| 電流 - 輸出 / 通道： | 35mA |
| 電壓 - 電源，單路/雙路(±)： | 4 V ~ 5.5 V，±2 V ~ 2.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 16-QFN-EP（3x3） |
| 包裝： | 管件 |
11
64026fa
LT6402-6
The LT6402-6 has been designed to minimize the need
for external support components such as transformers or
AC-coupling capacitors. As an ADC driver, the LT6402-6
requires no external components except for power-supply
bypass capacitors. This allows DC-coupled operation for
applications that have frequency ranges including DC.
At the outputs, the common mode voltage is set via the
VOCM pin, allowing the LT6402-6 to drive ADCs directly. No
output AC-coupling capacitors or transformers are needed.
At the inputs, signals can be differential or single-ended
with virtually no difference in performance. Furthermore,
DC levels at the inputs can be set independently of the
output common mode voltage. These input characteristics
often eliminate the need for an input transformer and/or
AC-coupling capacitors.
Input Impedance and Matching Networks
Calculation of the input impedance of the LT6402-6 is not
straightforward from examination of the block diagram
because of the internal feedback network. In addition, the
input impedance when driven differentially is different than
when driven single-ended.
DIFFERENTIAL
SINGLE-ENDED
LT6402-6
200Ω
133Ω
For single-ended 50Ω applications, an 80.6Ω shunt
matching resistor to ground will result in the proper input
termination (Figure 1). For differential inputs there are
several termination options. If the input source is 50Ω
differential, then the input matching can be accomplished
by either a 67Ω shunt resistor across the inputs (Figure 3),
or equivalent 33Ω shunt resistors on each of the inputs
to ground (Figure 2).
Figure 1. Input Termination for Single-Ended
50Ω Input Impedance
Single-Ended to Differential Operation
The LT6402-6’s performance with single-ended inputs is
comparable to its performance with differential inputs.
This excellent single-ended performance is largely due
to the internal topology of the LT6402-6. Referring to
the block diagram, if the +INA and +INB pins are driven
with a single-ended signal (while –INA and –INB are tied
to AC ground), then the +OUT and –OUT pins are driven
differentially without any voltage swing needed from
amplier C. Single-ended to differential conversion using
more conventional topologies suffers from performance
limitations due to the common mode amplier.
Driving ADCs
The LT6402-6 has been specically designed to interface
directly with high speed Analog to Digital Converters
(ADCs). In general, these ADCs have differential inputs, with
an input impedance of 1kΩ or higher. In addition, there is
generally some form of lowpass or bandpass ltering just
prior to the ADC to limit input noise at the ADC, thereby
improving system signal to noise ratio. Both the unltered
and ltered outputs of the LT6402-6 can easily drive the
Figure 3. Alternate Input Termination for Differential
50Ω Input Impedance
Figure 2. Input Termination for Differential 50Ω Input Impedance
APPLICATIONS INFORMATION
64026 F01
IF IN
0.1μF
LT6402-6
–INA
–INB
–OUT
+OUT
8
5
+INB
+INA
14
13
15
80.6Ω
ZIN = 50Ω
SINGLE-ENDED
16
64026 F02
IF IN–
IF IN+
LT6402-6
–INA
–INB
–OUT
+OUT
8
5
+INB
+INA
14
13
15
33Ω
ZIN = 50Ω
DIFFERENTIAL
16
33Ω
64026 F03
IF IN–
IF IN+
LT6402-6
–INA
–INB
–OUT
+OUT
8
5
+INB
+INA
14
13
15
ZIN = 50Ω
DIFFERENTIAL
16
67Ω
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| LT6402IUD-6-TR | 制造商:LINER 制造商全稱:Linear Technology 功能描述:300MHz Low Distortion, Low Noise Differential Amplifi er/ ADC Driver (AV = 6dB) |
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