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參數(shù)資料
| 型號(hào)： | LT6350CMS8#TRPBF |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類(lèi)： | ADC |
| 英文描述： | 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO8 |
| 封裝： | LEAD FREE, PLASTIC, MSOP-8 |
| 文件頁(yè)數(shù)： | 22/28頁(yè) |
| 文件大?。?/td> | 462K |
| 代理商： | LT6350CMS8#TRPBF |
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LT6350
3
6350fb
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VOSDIFF
Differential Input-Referred Offset Voltage
VS = 5V
V+IN1 = V2 = Mid-Rail
V+IN1 = V2 = V–+1.5V to V+ – 0.1V
l
–0.4
–0.45
–0.77
±0.1
0.4
0.45
1.36
mV
VS = 3V
V+IN1 = V2 = V–+1.5V to V+ – 0.1V
l
–0.45
–0.8
±0.1
0.45
1.36
mV
VS = 10V
V+IN1 = V2 = V–+1.5V to V+ – 0.1V
l
–0.52
–0.78
±0.1
0.52
1.48
mV
VOS1
Input Offset Voltage, Op Amp 1
VS = 5V
V+IN1 = V–+1.5V to V+
V+IN1 = V– to V+
l
–0.35
–1.5
±0.08
±0.28
0.68
1.5
mV
VS = 3V
V+IN1 = V–+1.5V to V+
V+IN1 = V– to V+
l
–0.35
–1.5
±0.08
±0.32
0.68
1.5
mV
VS = 10V
V+IN1 = V–+1.5V to V+
V+IN1 = V– to V+
l
–0.68
–1.5
±0.07
±0.28
0.68
1.5
mV
VOS2
Input Offset Voltage, Op Amp 2 (Note 6)
VS = 3V, 5V, 10V
V+IN1 = V2 = V–+1.5V to V+ – 0.1V
l
–1.0
±0.1
0.66
mV
ΔVOSDIFF/ΔT
Differential Offset Voltage Drift
V+IN1 = V2 = V– +1.5V
V+IN1 = V2 = V+ –0.1V
l
5
5.5
μV/°C
IB1
Input Bias Current, Op Amp 1
(at +IN1, –IN1)
V+IN1 = Mid-Supply
V+IN1 = V–
V+IN1 = V+
l
–6.8
–8.0
–1.2
–3.0
1.4
2.6
μA
IOS1
Input Offset Current, Op Amp 1
(at +IN1, –IN1)
V+IN1 = Mid-Supply
V+IN1 = V–
V+IN1 = V+
l
–1
±0.1
1
μA
I+IN2
Input Bias Current, Op Amp 2 (at +IN2)
V+IN1 = V2 = Mid-Supply
l
2.5
4.4
μA
IOS2
Input Offest Current, Op Amp 2
V2 = Mid-Supply
±0.1
μA
en1
Input Voltage Noise Density, Op Amp 1
Op Amp Input Referred
1.9
nV/√Hz
in1
Input Current Noise Density, Op Amp 1
1.1
pA/√Hz
en2
Input Voltage Noise Density, Op Amp 2
Op Amp Input Referred
2.1
nV/√Hz
in2
Input Current Noise Density, Op Amp 2
1
pA/√Hz
en(OUT)
Differential Output Noise Voltage Density
Total Output Noise Including Both Op Amps
and On-Chip Resistors. Input Shorted. f = 10kHz
8.2
nV/√Hz
Input Noise Voltage
0.1Hz to 10Hz
300
nVP-P
SNR
Output Signal-to-Noise Ratio
VOUTDIFF = 8VP-P, 1MHz Noise Bandwidth
110
dB
V+IN1
Input Voltage Range, +IN1
Guaranteed by CMRR1
l
V–
V+
V
V+IN2
Input Voltage Range, +IN2
Guaranteed by CMRR2
l V– +1.5V
V+ –0.1V
V
RIN
Input Resistance
Single-Ended Input at +IN1
4
MΩ
The
l denotes specications that apply over the full specied temperature range,
otherwise specications are at TA = 25°C. Unless noted otherwise, V+ = 5V, V– = 0V, V+IN1 = V2 = Mid-Supply, VSHDN = V+, RL = OPEN, RF =
SHORT, RG = OPEN. VS is dened as (V+ – V–). VOUTCM is dened as (VOUT1 + VOUT2)/2. VOUTDIFF is dened as (VOUT1 – VOUT2). See Figure 1.
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