參數(shù)資料
型號(hào): LT6202IS8
英文描述: Operational Amplifier
中文描述: 運(yùn)算放大器
文件頁(yè)數(shù): 15/24頁(yè)
文件大?。?/td> 322K
代理商: LT6202IS8
LT6202/LT6203/LT6204
15
620234f
Amplifier Characteristics
Figure 1 shows a simplified schematic of the LT6202/
LT6203/LT6204, which has two input differential amplifi-
ers in parallel that are biased on simultaneously when the
common mode voltage is at least 1.5V from either rail. This
topology allows the input stage to swing from the positive
supply voltage to the negative supply voltage. As the
common mode voltage swings beyond V
CC
– 1.5V, current
source I
1
saturates and current in Q1/Q4 is zero. Feedback
is maintained through the Q2/Q3 differential amplifier, but
with an input g
m
reduction of 1/2. A similar effect occurs
with I
2
when the common mode voltage swings within
1.5V of the negative rail. The effect of the g
m
reduction is
a shift in the V
OS
as I
1
or I
2
saturate.
Figure 1. Simplified Schematic
APPLICATIU
W
U
U
Input bias current normally flows out of the + and – inputs.
The magnitude of this current increases when the input
common mode voltage is within 1.5V of the negative rail,
and only Q1/Q4 are active. The polarity of this current
reverses when the input common mode voltage is within
1.5V of the positive rail and only Q2/Q3 are active.
The second stage is a folded cascode and current mirror
that converts the input stage differential signals to a single
ended output. Capacitor C1 reduces the unity cross
frequency and improves the frequency stability without
degrading the gain bandwidth of the amplifier. The
differential drive generator supplies current to the output
transistors that swing from rail-to-rail.
DIFFERENTIAL
DRIVE
GENERATOR
+
R1
R2
R3
R4
R5
Q2
Q3
Q5
Q6
Q9
Q8
Q7
Q10
Q11
Q1
Q4
I
1
I
2
D3
D2
D1
DESD2
DESD4
DESD3
DESD1
+
DESD5
DESD6
V
BIAS
C
M
C1
+V
+V
+V
+V
–V
–V
–V
V
+
V–
6203/04 F01
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