參數(shù)資料
型號(hào): LT6200CS6
廠商: LINEAR TECHNOLOGY CORP
元件分類: 運(yùn)動(dòng)控制電子
英文描述: 165MHz, Rail-to-Rail Input and Output, 0.95nV Low Noise, Op Amp Family
中文描述: OP-AMP, 7500 uV OFFSET-MAX, 165 MHz BAND WIDTH, PDSO6
封裝: PLASTIC, TSOT-23, 6 PIN
文件頁數(shù): 10/24頁
文件大?。?/td> 557K
代理商: LT6200CS6
LT6200/LT6200-5
LT6200-10/LT6201
10
62001fa
TYPICAL PERFOR U
V
OS
Distribution, V
CM
= V
+
/2
INPUT OFFSET VOLTAGE (
μ
V)
–1000
N
80
70
60
50
40
30
20
10
0
600
6200 G01
–600
–200
200
1000
V
= 5V, 0V
SO-8
INPUT OFFSET VOLTAGE (
μ
V)
–1600–1200
N
40
60
1600
6200 G02
20
0
–800 –400
0
400
800 1200
80
30
50
10
70
V
= 5V, 0V
SO-8
INPUT OFFSET VOLTAGE (
μ
V)
–1600–1200
N
40
60
1600
6200 G03
20
0
–800 –400
0
400
800 1200
80
30
50
10
70
V
= 5V, 0V
SO-8
V
OS
Distribution, V
CM
= V
+
V
OS
Distribution, V
CM
= V
ELECTRICAL CHARACTERISTICS
Note 5:
The LT6200C/LT6201C are guaranteed to meet specified
performance from 0
°
C to 70
°
C. The LT6200C/LT6201C are designed,
characterized and expected to meet specified performance from –40
°
C to
85
°
C, but are not tested or QA sampled at these temperatures. The
LT6200I is guaranteed to meet specified performance from –40
°
C to 85
°
C.
Note 6:
Minimum supply voltage is guaranteed by power supply rejection
ratio test.
Note 7:
Output voltage swings are measured between the output and
power supply rails.
Note 8:
This parameter is not 100% tested.
Note 9:
Full-power bandwidth is calculated from the slew rate:
FPBW = SR/2
π
V
P
Note 10:
Thermal resistance varies depending upon the amount of PC
board metal attached to the V
pin of the device.
θ
JA
is specified for a
certain amount of 2oz copper metal trace connecting to the V
pin as
described in the thermal resistance tables in the Application Information
section.
Note 11:
Matching parameters on the LT6201 are the difference between
the two amplifiers. CMRR and PSRR match are defined as follows: CMRR
and PSRR are measured in
μ
V/V on the identical amplifiers. The difference
is calculated in
μ
V/V. The result is converted to dB.
Note 12:
There are reverse biased ESD diodes on all inputs and outputs as
shown in Figure 1. If these pins are forced beyond either supply, unlimited
current will flow through these diodes. If the current is transient in nature
and limited to less than 30mA, no damage to the device will occur.
Supply Current vs Supply Voltage
Offset Voltage
vs Input Common Mode Voltage
Input Bias Current
vs Common Mode Voltage
TOTAL SUPPLY VOLTAGE (V)
0
S
20
25
30
6
10
6200 G04
15
10
2
4
8
12
14
5
0
T
A
= 125
°
C
T
A
= –55
°
C
T
A
= 25
°
C
INPUT COMMON MODE VOLTAGE (V)
0
–1.5
O
–1.0
0
0.5
1.0
2
4
5
3.0
6200 G05
–0.5
1
3
1.5
2.0
2.5
V
= 5V, 0V
TYPICAL PART
T
A
= 125
°
C
T
A
= –55
°
C
T
A
= 25
°
C
COMMON MODE VOLTAGE (V)
–1
I
μ
A
0
10
20
2
4
6200 G06
–10
–20
0
1
3
5
6
–30
–40
V
S
= 5V, 0V
T
A
= 125
°
C
T
A
= –55
°
C
T
A
= 25
°
C
相關(guān)PDF資料
PDF描述
LT6200CS8 165MHz, Rail-to-Rail Input and Output, 0.95nV Low Noise, Op Amp Family
LT6200CS8-10 165MHz, Rail-to-Rail Input and Output, 0.95nV Low Noise, Op Amp Family
LT6200CS8-5 165MHz, Rail-to-Rail Input and Output, 0.95nV Low Noise, Op Amp Family
LT6200IS6 165MHz, Rail-to-Rail Input and Output, 0.95nV Low Noise, Op Amp Family
LT6200CS6-10 165MHz, Rail-to-Rail Input and Output, 0.95nV Low Noise, Op Amp Family
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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