LT6105
14
6105fa
There is no phase inversion. For the opposite case, when
VS+ collapses to ground with VS– held up at some higher
voltage potential, the output will sit at VO(MIN).
The Two Input Stages Crossover Region
The wide common mode input range is achieved with two
input stages. These two input stages consist of a pair of
matched common base PNP input transistors and a pair
of common emitter PNP input transistors. As result of
two input stages, there will be three distinct operating
regions around the transition region as shown in the Input
Bias Current vs Sense Input Voltage curve in the Typical
Performance Characteristics section.
The crossover voltage, the voltage where the gm of one
input stage is transferred to the other, occurs at 1.6V above
V–. Near this region, one input stage is shutting off while
the other is turning on. Increases in temperature will cause
the crossover voltage to decrease. For input operation
between 1.6V and 44V, the common base PNPs are active
(Q2, Q3 of Figure 1). The typical current through each
input at VSENSE = 0V is 15μA. The input offset voltage is
300μV maximum at room temperature. For input operation
between 1.6V to 0V, the other PNP is active. The current
out of the inputs at VSENSE = 0V is 100nA. The input offset
voltage is untrimmed and is typically 300μV.
Selection of External Output Resistor, ROUT
The output resistor, ROUT, determines how the output cur-
rent is converted to voltage. VOUT is simply IRIN ROUT.
In choosing an output resistor, the maximum output volt-
age must rst be considered. If the following circuit is a
buffer or ADC with limited input range, then ROUT must be
chosen so that IOUT(MAX) ROUT is less than the allowed
maximum input range of this circuit. In addition, the output
impedance is determined by ROUT.
If the circuit to be driven has high input impedance, then
almost any useful output impedance will be acceptable.
However, if the driven circuit has relatively low input imped-
ance, or draws spikes of current such as an ADC might
do, then a lower ROUT value may be required in order to
preserve the accuracy of the output. As an example, if the
input impedance of the driven circuit is 100 times ROUT,
then the accuracy of VOUT will be reduced by 1% since:
VI
RR
OUT
IN DRIVEN
OUT
IN DRIVEN
=
+
=
()
IIR
IR
OUT
.
100
101
099
=
Full-Scale Sense Voltage, Selection of External Input
Resistor, RIN
The external input resistor, RIN, controls the transconduc-
tance of the current sense circuit. Since IOUT = VSENSE/RIN,
transconductance gm = 1/RIN. For example, if RIN =100,
then IOUT = VSENSE/100 or IOUT = 1mA for VSENSE =100mV.
RIN should be chosen to allow the required resolution
while limiting the output current. The LT6105 can output
more than 1mA into ROUT without introducing a signi-
cant increase in gain error. By setting RIN such that the
largest expected sense voltage gives IOUT = 1mA, then
the maximum output dynamic range is available. Output
dynamic range is limited by both the maximum allowed
output current and the maximum allowed output voltage,
as well as the minimum practical output signal. If less
dynamic range is required, then RIN can be increased
accordingly, reducing the maximum output current and
power dissipation. The LT6105’s performance is optimized
for values of RIN = 100Ω to 1k. Values outside this range
may result in additional errors. The power dissipation
across RIN and ROUT should not exceed the resistors’
recommended ratings.
APPLICATIONS INFORMATION