
LT4430
6
4430f
PIU
V
IN
(Pin 1):
This is the input supply that powers all in-
ternal circuitry. The input supply range is 3V minimum
to 20V maximum and the typical input quiescent current
is 1.9mA. Connect a 1μF bypass capacitor directly from
V
IN
to GND.
GND (Pin 2):
Analog Ground Pin. It is also the negative
sense terminal for the internal 0.6V reference. Connect the
external feedback divider network that terminates to ground
directly to this pin for best regulation and performance.
OC (Pin 3):
Overshoot Control Pin. A typical 8.5μA current
source and a capacitor placed from this pin to GND controls
output voltage overshoot on startup and recovery from
short-circuit. The typical ramp time is (C
OC
0.6V)/8.5μA.
If V
IN
is below V
UVLO
(its undervoltage lockout threshold),
the OC pin is actively held low. The OC pin also ties to the
overshoot control amplifier output. This amplifier monitors
the FB pin voltage and the error amplifier output. If FB is
low due to a short-circuit fault condition, the COMP pin
goes high. Logic detects the error amplifier COMP pin high
state and activates the overshoot control amplifier. The
amplifier responds by discharging the OC capacitor down
to the FB voltage plus a built-in offset voltage of 48mV. If
the short-circuit condition persists, the amplifier maintains
the voltage on OC. If the short-circuit condition goes away,
the FB pin recovers under the control of the OC pin.
FB (Pin 4):
This is the inverting input of the error ampli-
fier. The non-inverting input is tied to the internal 0.6V
reference. Input bias current for this pin is typically 75nA
flowing out of the pin. This pin normally ties to a resistor
divider network to set output voltage. Tie the top of the
external resistor divider directly to the output voltage for
best regulation performance.
COMP (Pin 5):
This is the output of the error amplifier. The
error amplifier is a true voltage-mode error amplifier and
frequency compensation is performed around the amplifier.
Typical LT4430 compensation schemes use series R-C in
parallel with C networks from the COMP pin to the FB pin.
COMP also ties to the overshoot control amplifier logic
that detects if the COMP pin is at its high clamp level. The
logic activates the overshoot control amplifier if COMP is
at its clamp level for longer than 1μs.
OPTO (Pin 6):
This is the output of the amplifier that
drives the optocoupler. The opto driver amplifier uses an
inverting gain of six configuration to drive the optocoupler
referenced to ground. Driving the optocoupler referenced
to GND accommodates low output voltages and eases
loop frequency compensation as the secondary feedback
path with a traditional “431” topology is eliminated. The
opto driver amplifier sources a maximum of 10mA, sinks
350μA typically and is short-circuit protected.