參數(shù)資料
型號: LT3782
廠商: Linear Technology Corporation
英文描述: 2-Phase Step-Up DC/DC Controller
中文描述: 2相升壓型DC / DC控制器
文件頁數(shù): 8/16頁
文件大?。?/td> 200K
代理商: LT3782
LT3782
8
3782fa
APPLICATIU
With a 200ns one-shot timer on chip, the LT3782 provides
flexibility on the external sync pulse width. The sync pulse
threshold is about 1.2V (Figure 1).
W
U
U
to compensate for the propagation delay of external gate
driver, a resistor divider can be used from R
SET
to ground
to program V
DELAY
for the longer delay needed. For
example, for a switching frequency of 250kHz and delay of
150ns, then R
FREQ1
+ R
FREQ2
should be 80k and V
DELAY
should be 1V, with V
RSET
= 2.3V then R
FREQ1
= 47.5k and
R
FREQ2
= 32.5k (see Figure 3).
Figure 1. Synchronizing with External Clock
Figure 2. Delay Timing
Current Limit
Current limit is set by the 60mV threshold across SEN1P,
SEN1N for channel one and SEN2P, SEN2N for channel
two. By connecting an external resistor R
S
(see Block
Diagram), the current limit is set for 60mV/R
S
. R
S
should
be placed very close to the power switch with very short
traces. A low pass R
C
filter is needed across R
S
to filter out
the switching spikes. Good Kelvin sensing is required for
accurate current limit. The input bypass capacitor ground
should be at the same ground point of the current sense
resistor to minimize the ground current path.
Synchronous Rectifier Switches
For high output voltage applications, the power loss of the
catch diodes are relatively small because of high duty
cycle. If diodes power loss or heat is a concern, the LT3782
provides PWM signals through SGATE1 and SGATE2 pins
to drive external MOSFET drivers for synchronous rectifier
operation. Note that SGATE drives the top switch and
BGATE drives the bottom switch. To avoid cross conduc-
tion between top and bottom switches, the BGATE turn-on
is delayed 100ns (when DELAY pin is tied to R
SET
pin) from
SGATE turn-off (see Figure 2). If a longer delay is needed
Figure 3. Increase Delay Time
R
SET
DELAY
LT3782
R
FREQ2
R
FREQ1
3782 F03
Duty Cycle Limit
When DCL pin is shorted to R
SET
pin and switching
frequency is less than 250kHz (R
FREQ
> 80k), the maxi-
mum duty cycle of LT3782 will be at least 90%. The
maximum duty cycle can be clamped to 50% by grounding
the DCL pin or to 75% by forcing the V
DCL
voltage to 1.2V
with a resistor divider from R
SET
pin to ground. The typical
DCL pin input current is 0.2
μ
A.
Slope Compensation
The LT3782 is designed for high voltage and/or high
current applications, and very often these applications
generate noise spikes that can be picked up by the current
sensing amplifier and cause switching jitter. To avoid
switching jitter, careful layout is absolutely necessary to
minimize the current sensing noise pickup. Sometimes
increasing slope compensation to overcome the noise can
help to reduce jitter. The built-in slope compensation can
be increased by adding a resistor R
SLOPE
from SLOPE pin
to ground. Note that smaller R
SLOPE
increases slope
compensation and the minimum R
SLOPE
allowed is
R
FREQ
/2.
5V TO 20V
VN2222
PULSE WIDTH > 200ns
5k
SYNC
3782 F01
LT3782
3782 F02
DELAY
BGATE1
SGATE1
SET
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