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參數(shù)資料
| 型號(hào)： | LT3433EFE |
| 廠(chǎng)商： | LINEAR TECHNOLOGY CORP |
| 元件分類(lèi)： | 穩(wěn)壓器 |
| 英文描述： | 40 POS PEEL-A-WAY® SINGLE ROW SOCKET |
| 中文描述： | 0.9 A SWITCHING REGULATOR, 230 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封裝： | 4.40 MM, PLASTIC, TSSOP-16 |
| 文件頁(yè)數(shù)： | 5/12頁(yè) |
| 文件大?。?/td> | 183K |
| 代理商： | LT3433EFE |
5
LT3433
3433ia
PIU
V
FB
(Pin 7):
Error Amplifier Inverting Input. The noninvert-
ing input of the error amplifier is connected to an internal
1.231V reference. The V
FB
pin is connected to a resistor
divider from the converter output. Values for the resistor
connected from V
OUT
to V
FB
(R
FB1
) and the resistor con-
nected from V
FB
to ground (R
FB2
) can be calculated to pro-
gram converter output voltage (V
OUT
) via the following
relation:
V
OUT
= 1.231 (R
FB1
+ R
FB2
)/R
FB2
The V
FB
pin input bias current is 35nA, so use of extremely
high value feedback resistors could cause a converter
output that is slightly higher than expected. Bias current
error at the output can be estimated as:
V
OUT(BIAS)
= 35nA R
FB1
The voltage on V
FB
also controls the LT3433 oscillator
frequency through a “frequency-foldback” function. When
the V
FB
pin voltage is below 0.8V, the oscillator runs slower
than the 200kHz typical operating frequency. The oscilla-
tor frequency slows with reduced voltage on the pin, down
to 50kHz when V
FB
= 0V.
The V
FB
pin voltage also controls switch current limit
through a “current-limit foldback” function. At V
FB
= 0V, the
maximum switch current is reduced to half of the normal
value. The current limit value increases linearly until V
FB
reaches 0.6V when the normal maximum switch current
level is restored. The frequency and current-limit foldback
functions add robustness to short-circuit protection and
help prevent inductor current runaway during start-up.
SS (Pin 10):
Soft Start. Connect a capacitor (C
SS
) from this
pin to ground. The output voltage of the LT3433 error
amplifier corresponds to the peak current sense amplifier
output detected before resetting the switch output(s). The
soft-start circuit forces the error amplifier output to a zero
peak current for start-up. A 5
μ
A current is forced from the
SS pin onto an external capacitor. As the SS pin voltage
ramps up, so does the LT3433 internally sensed peak cur-
rent limit. This forces the converter output current to ramp
from zero until normal output regulation is achieved. This
function reduces output overshoot on converter start-up.
SGND (Pins 1, 8, 9, 16):
Low Noise Ground Reference.
V
BST
(Pin 2):
Boosted Switch Supply. This “boosted” sup-
ply rail is referenced to the SW_H pin. Supply voltage is
maintained by a bootstrap capacitor tied from the V
BST
pin
to the SW_H pin. A 1
μ
F capacitor is generally adequate for
most applications.
The charge on the bootstrap capacitor is refreshed through
a diode, typically connected from the converter output
(V
OUT
), during the switch-off period. Minimum off-time
operation assures that the boost capacitor is refreshed each
switch cycle. The LT3433 supports operational V
BST
sup-
ply voltages up to 75V (absolute maximum) as referenced
to ground.
SW_H (Pin 3):
Boosted Switch Output. This is the current
return for the boosted switch and corresponds to the emitter
of the switch transistor. The boosted switch shorts the
SW_H pin to the V
IN
supply when enabled. The drive cir-
cuitry for this switch is boosted above the V
IN
supply
through the V
BST
pin, allowing saturation of the switch for
maximum efficiency. The “ON” resistance of the boosted
switch is 0.8
.
V
IN
(Pin 4):
Input Power Supply. This pin supplies power
to the boosted switch and corresponds to the collector of
the switch transistor.This pin also supplies power to most
of the IC’s internal circuitry if the V
BIAS
pin is not driven
externally. This supply will be subject to high switching
transient currents so this pin requires a high quality bypass
capacitor that meets whatever application-specific input
ripple current requirements exist. See Applications Infor-
mation.
BURST_EN (Pin 5):
Burst Mode Enable Pin. Shorting this
pin to SGND enables Burst Mode operation. If Burst Mode
operation is not desired, connecting this pin to V
BIAS
or V
OUT
will disable the burst function.
V
C
(Pin 6):
Error Amplifier Output. The voltage on the V
C
pin corresponds to the maximum switch current per oscil-
lator cycle. The error amplifier is typically configured as an
integrator circuit by connecting an RC network from this
pin to ground. This circuit typically creates the dominant
pole for the converter regulation feedback loop. Specific in-
tegrator characteristics can be configured to optimize tran-
sient response. See Applications Information.
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| LT3433EFE#PBF | 功能描述:IC REG BUCK BST ADJ 0.5A 16TSSOP RoHS:是 類(lèi)別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 開(kāi)關(guān)穩(wěn)壓器 系列:- 標(biāo)準(zhǔn)包裝:250 系列:- 類(lèi)型:降壓（降壓） 輸出類(lèi)型:固定 輸出數(shù):1 輸出電壓:1.2V 輸入電壓:2.05 V ~ 6 V PWM 型:電壓模式 頻率 - 開(kāi)關(guān):2MHz 電流 - 輸出:500mA 同步整流器:是 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:6-UFDFN 包裝:帶卷 (TR) 供應(yīng)商設(shè)備封裝:6-SON（1.45x1） 產(chǎn)品目錄頁(yè)面:1032 (CN2011-ZH PDF) 其它名稱(chēng):296-25628-2 |
| LT3433EFE#TR | 功能描述:IC REG BUCK BST ADJ 0.5A 16TSSOP RoHS:否 類(lèi)別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 開(kāi)關(guān)穩(wěn)壓器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類(lèi)型:降壓（降壓） 輸出類(lèi)型:固定 輸出數(shù):1 輸出電壓:1.2V，1.5V，1.8V，2.5V 輸入電壓:2.7 V ~ 20 V PWM 型:- 頻率 - 開(kāi)關(guān):- 電流 - 輸出:50mA 同步整流器:是 工作溫度:-40°C ~ 125°C 安裝類(lèi)型:表面貼裝 封裝/外殼:10-TFSOP，10-MSOP（0.118"，3.00mm 寬）裸露焊盤(pán) 包裝:帶卷 (TR) 供應(yīng)商設(shè)備封裝:10-MSOP 裸露焊盤(pán) |
| LT3433EFE#TRPBF | 功能描述:IC REG BUCK BST ADJ 0.5A 16TSSOP RoHS:是 類(lèi)別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 開(kāi)關(guān)穩(wěn)壓器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類(lèi)型:降壓（降壓） 輸出類(lèi)型:固定 輸出數(shù):1 輸出電壓:1.2V，1.5V，1.8V，2.5V 輸入電壓:2.7 V ~ 20 V PWM 型:- 頻率 - 開(kāi)關(guān):- 電流 - 輸出:50mA 同步整流器:是 工作溫度:-40°C ~ 125°C 安裝類(lèi)型:表面貼裝 封裝/外殼:10-TFSOP，10-MSOP（0.118"，3.00mm 寬）裸露焊盤(pán) 包裝:帶卷 (TR) 供應(yīng)商設(shè)備封裝:10-MSOP 裸露焊盤(pán) |
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