參數(shù)資料
型號(hào): LT3407-2
廠商: Linear Technology Corporation
英文描述: Dual Synchronous,400mA/800mA, 2.25MHz Step-Down DC/DC Regulator
中文描述: 雙同步,400mA/800mA,2.25MHz降壓直流/直流穩(wěn)壓器
文件頁數(shù): 9/16頁
文件大?。?/td> 239K
代理商: LT3407-2
LTC3548
9
3548f
capacitors, such as Sanyo POSCAP, Panasonic Special
Polymer (SP), and Kemet A700, offer very low ESR, but
have a lower capacitance density than other types. Tanta-
lum capacitors have the highest capacitance density, but
they have a larger ESR and it is critical that the capacitors
are surge tested for use in switching power supplies. An
excellent choice is the AVX TPS series of surface mount
tantalums, available in case heights ranging from 2mm to
4mm. Aluminum electrolytic capacitors have a signifi-
cantly larger ESR, and are often used in extremely cost-
sensitive applications provided that consideration is given
to ripple current ratings and long term reliability. Ceramic
capacitors have the lowest ESR and cost, but also have the
lowest capacitance density, a high voltage and tempera-
ture coefficient, and exhibit audible piezoelectric effects.
In addition, the high Q of ceramic capacitors along with
trace inductance can lead to significant ringing.
In most cases, 0.1
μ
F to 1
μ
F of ceramic capacitors should
also be placed close to the LTC3548 in parallel with the
main capacitors for high frequency decoupling.
Ceramic Input and Output Capacitors
Higher value, lower cost ceramic capacitors are now
becoming available in smaller case sizes. These are tempt-
ing for switching regulator use because of their very low
ESR. Unfortunately, the ESR is so low that it can cause
loop stability problems. Solid tantalum capacitor ESR
generates a loop “zero” at 5kHz to 50kHz that is instrumen-
tal in giving acceptable loop phase margin. Ceramic ca-
pacitors remain capacitive to beyond 300kHz and usually
resonate with their ESL before ESR becomes effective.
Also, ceramic caps are prone to temperature effects which
APPLICATIU
W
U
U
Figure 2. LTC3548 General Schematic
RUN2
V
IN
V
IN
= 2.5V
TO 5.5V
V
OUT2
V
OUT1
RUN1
POR
SW1
V
FB1
GND
V
FB2
SW2
MODE/SYNC
LTC3548
C
IN
BM*
R5
POWER-ON
RESET
C4
C5
L1
L2
R4
R2
R1
R3
C
OUT2
C
OUT1
3548 F02
PS*
*MODE/SYNC = 0V: PULSE SKIP
MODE/SYNC = V
IN
: Burst Mode
requires the designer to check loop stability over the
operating temperature range. To minimize their large
temperature and voltage coefficients, only X5R or X7R
ceramic capacitors should be used. A good selection of
ceramic capacitors is available from Taiyo Yuden, AVX,
Kemet, TDK, and Murata.
Great care must be taken when using only ceramic input
and output capacitors. When a ceramic capacitor is used
at the input and the power is being supplied through long
wires, such as from a wall adapter, a load step at the output
can induce ringing at the V
IN
pin. At best, this ringing can
couple to the output and be mistaken as loop instability. At
worst, the ringing at the input can be large enough to
damage the part.
Since the ESR of a ceramic capacitor is so low, the input
and output capacitor must instead fulfill a charge storage
requirement. During a load step, the output capacitor must
instantaneously supply the current to support the load
until the feedback loop raises the switch current enough to
support the load. The time required for the feedback loop
to respond is dependent on the compensation and the
output capacitor size. Typically, 3-4 cycles are required to
respond to a load step, but only in the first cycle does the
output drop linearly. The output droop, V
DROOP
, is usually
about 2-3 times the linear drop of the first cycle. Thus, a
good place to start is with the output capacitor size of
approximately:
C
I
f
V
OUT
OUT
O
DROOP
2 5
More capacitance may be required depending on the duty
cycle and load step requirements.
In most applications, the input capacitor is merely re-
quired to supply high frequency bypassing, since the
impedance to the supply is very low. A 10
μ
F ceramic
capacitor is usually enough for these conditions.
Setting the Output Voltage
The LTC3548 develops a 0.6V reference voltage between
the feedback pin, V
FB
, and the ground as shown in
Figure 2. The output voltage is set by a resistive divider
according to the following formula:
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