參數(shù)資料
型號(hào)： LT1952MPGN#TRPBF
廠商： LINEAR TECHNOLOGY CORP
元件分類： 穩(wěn)壓器
英文描述： SWITCHING CONTROLLER, 560 kHz SWITCHING FREQ-MAX, PDSO16
封裝： 0.150 INCH, LEAD FREE, PLASTIC, SSOP-16
文件頁(yè)數(shù)： 10/28頁(yè)
文件大?。?/td> 357K
代理商： LT1952MPGN#TRPBF
LT1952/LT1952-1
18
19521fe
(A) VIN > 14.25* (7.75V LT1952-1), and
(B) SD_VSEC > 1.32V, and
(C) OC < 107mV, and
(D) SS_MAXDC < 0.45V (SS_MAXDC reset threshold)
*VIN>8.75V(6.5VLT1952-1)isokforlatchresetifthelatch
was only set by overcurrent condition in (3) above.
SS_MAXDC Discharge Timing
It can be seen in Figure 10 that two types of discharge
can occur for the SS_MAXDC pin. In timing (A) the fault
that caused the soft-start event has been removed before
SS_MAXDC falls to 0.45V. This means the soft-start
latch will be reset when SS_MAXDC falls to 0.45V and
SS_MAXDCwillbegincharging.Intiming(B),thefaultthat
caused the soft-start event is not removed until some time
after SS_MAXDC has fallen past 0.45V. The SS_MAXDC
pin continues to discharge to 0.2V and remains low until
all faults are removed.
The time for SS_MAXDC to fall to a given voltage can be
approximated as:
SS_MAXDC (tFALL) =
(CSS/IDIS)[SS_MAXDC(DC)–VSS(MIN)]
where:
IDIS = net discharge current on CSS
CSS = capacitor value at SS_MAXDC pin
SS_MAXDC(DC) = programmed DC voltage
VSS(MIN) = minimum SS_MAXDC voltage before
recharge
IDIS ~ 8e–4 + (VREF – VSS(MIN))[(1/2RB) – (1/RT)]
For faults arising from (1) and (2),
VREF = 100mV.
For a fault arising from (3),
VREF = 2.5V.
SS_MAXDC(DC) = VREF[RB/(RT + RB)]
VSS(MIN) = SS_MAXDC reset threshold = 0.45V
(if fault removed before tFALL)
APPLICATIONS INFORMATION
Example:
For an overcurrent fault (OC > 100mV), VREF = 2.5V,
RT = 35.7k, RB = 100k, CSS = 0.1F and assume
VSS(MIN) = 0.45V,
IDIS ~ 8e–4+(2.5–0.45)[(1/2100k)–(1/35.7k)]
= 8e–4 + (2.05)(–0.23e–4) = 7.5e–4
SS_MAXDC(DC) = 1.84V
SS_MAXDC (tFALL) = (1e – 7/7.5e–4)(1.84–0.45)
= 1.85e–4 s
IftheOCfaultisnotremovedbefore185sthenSS_MAXDC
will continue to fall past 0.45V towards a new VSS(MIN).
The typical VOL for SS_MAXDC at 150A is 0.2V.
SS_MAXDC Charge Timing
When all faults are removed and the SS_MAXDC pin
has fallen to its reset threshold of 0.45V or lower, the
SS_MAXDC pin will be released and allowed to charge.
SS_MAXDC will rise until it settles at its programmed DC
voltage—setting the maximum switch duty cycle clamp.
The calculation of charging time for the SS_MAXDC pin
between any two voltage levels can be approximated as
an RC charging waveform using the model shown in
Figure 11.
TheabilitytopredictSS_MAXDCrisetimebetweenanytwo
voltages allows prediction of several key timing periods:
(1)No Switching Period
(time from SS_MAXDC(DC) to VSS(MIN) + time from
VSS(MIN) to VSS(ACTIVE))
(2)Converter Output Rise Time
(time from VSS(ACTIVE) to VSS(REG); VSS(REG) is the
level of SS_MAXDC where maximum duty cycle
clamp equals the natural duty cycle of the switch)
(3)Time For Maximum Duty Cycle Clamp within X% of
Target Value
The time for SS_MAXDC to charge to a given voltage VSS
is found by re-arranging:
相關(guān)PDF資料
PDF描述
LT3412AIFE 3 A SWITCHING REGULATOR, 4 kHz SWITCHING FREQ-MAX, PDSO16
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