參數(shù)資料
型號(hào): LT1948EMS8
廠商: Linear Integrated Systems
英文描述: DC/DC Converter for TFT-LCD Panels
中文描述: 直流/直流轉(zhuǎn)換器,用于TFT - LCD面板
文件頁數(shù): 1/4頁
文件大小: 135K
代理商: LT1948EMS8
LT1948
1
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
I
TFT-LCD Notebook Display Panels
I
TFT-LCD Desktop Monitor Display Panels
I
Digital Cameras
I
Handheld Computers
, LTC and LT are registered trademarks of Linear Technology Corporation.
I
Complete Solution Under 1.2mm
I
Develops Three Outputs from a 3.3V or 5V Supply
I
Externally Programmable V
ON
Delay
I
Fixed Frequency Low Noise Outputs
I
All Ceramic Capacitors
I
Operates at 3MHz Switching Frequency
I
Fast Transient Response
I
Few External Components Required
I
2.6V to 6V Input Range
I
Tiny 8-Lead MSOP Package
APPLICATIOU
FEATURES
DESCRIPTIO
U
TYPICAL APPLICATIO
U
DC/DC Converter for
TFT-LCD Panels
August 2000
Final Electrical Specifications
L2, 2.2
μ
H
BAT54S
D3A
D3B
D1
MBRM120
C5
1
μ
F
C4
0.22
μ
F
C2
2.2
μ
F
C1
2.2
μ
F
V
IN
2.5V TO
6V
AV
DD
8V
260mA
V
ON
23V
10mA
1948 F01
V
OFF
–8V
15mA
FB1
SW1
LT1948
V
IN
V
ON
C
T
SW2
VO2
C6
22nF
C1, C2: TAIYO YUDEN LMK212BJ225
C3: TAIYO YUDEN TMK316BJ224
C4: TAIYO YUDEN EMK212BJ224
C5: TAIYO YUDEN LMK212BJ105
L1–L3: TAIYO YUDEN LB2012-2R2
GND
L1, 2.2
μ
H
D2
CMDSH-3
L3
2.2
μ
H
C3
0.22
μ
F
R1
53.6k
R2
10k
Figure 1. 3.3V Powered TFT-LCD Bias Generator
2ms/DIV
1948 TA01a
V
IN
5V/DIV
V
ON
20V/DIV
AV
DD
10V/DIV
V
OFF
10V/DIV
Start-Up Waveforms
The LT
1948 is a highly integrated multiple output DC/DC
converter designed for use in TFT-LCD panels. The device
contains two independent switching regulators: the main
regulator has an adjustable output voltage with an internal
1.1A switch that can generate a boosted voltage as high as
30V while the second regulator generates 23V at up to
10mA for positive bias. A simple level-shift charge pump
off the main switch node generates the negative bias
voltage. An external capacitor sets the delay time from
AV
DD
reaching final value to 23V appearing at the V
ON
pin.
The 3MHz switching frequency allows the use of tiny low
profile chip inductors and capacitors throughout, provid-
ing a low noise, low cost total solution with all components
under 1.25mm in height. The device operates from an
input range of 2.6V to 6V and is available in an 8-lead
MSOP package.
NOT RECOMMENDED FOR NEW DESIGNS
Contact Linear Technology for Potential Replacement
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