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參數(shù)資料
| 型號(hào)： | LT1767EMS8#TR-3.3 |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 3 A SWITCHING REGULATOR, 1500 kHz SWITCHING FREQ-MAX, PDSO8 |
| 封裝： | PLASTIC, MSOP-8 |
| 文件頁(yè)數(shù)： | 7/16頁(yè) |
| 文件大?。?/td> | 232K |
| 代理商： | LT1767EMS8#TR-3.3 |
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LT1767/LT1767-1.8/
LT1767-2.5/LT1767-3.3/LT1767-5
APPLICATIONS INFORMATION
WU
U
3.3V, 1A
* ONLY REQUIRED IF INPUT CAN SINK >10mA
REMOVABLE
INPUT
0.1
F
1.5nF
83k
MBRS130T3
1767 F09
2.2
F
MBRS130T3*
1N914
5
H
2.2
F
BOOST
LT1767-3.3
VIN
VSW
FB
SHDN
GND
VC
SYNC
ALTERNATE
SUPPLY
28.5k
4.7k
Figure 9. Dual Source Supply with 6
A Reverse Leakage
Figure 10. Buck Converter with Adjustable Soft-Start
BOOST
LT1767-5
VIN
OUTPUT
5V
1A
INPUT
12V
1767 F10
C2
0.1
F
C1
100
F
CSS
15nF
CC
330pF
D1
C3
2.2
F
D2
1N914
L1
5
H
R3
2k
VSW
FB
SHDN
GND
VC
SYNC
+
R4
47k
Q1
D1: MBRM140
Q1: 2N3904
OUTPUT
5V
OUTPUT
–5V
* L1 IS A SINGLE CORE WITH TWO WINDINGS
BH ELECTRONICS #511-1013
IF LOAD CAN GO TO ZERO,
AN OPTIONAL PRELOAD OF 1k TO 5k
MAY BE USED TO IMPROVE LOAD REGULATION
D1, D3: MBRM140
INPUT
6V TO 15V
GND
1767 F11
C2
0.1
F
CC
330pF
D1
C1
100
F
10V TANT
C5
100
F
10V TANT
C3
2.2
F
16V
CERAMIC
C4
2.2
F
16V
CERAMIC
D2
1N914
D3
L1A*
9
H
L1B*
+
BOOST
LT1767-5
VIN
VSW
FB
SHDN
GND
VC
SYNC
Figure 11. Dual Output SEPIC Converter
through CSS defined by R4 and Q1’s VBE. Once the output
is in regulation, Q1 turns off and the circuit operates
normally. R3 is transient protection for the base of Q1.
RiseTime
RC
V
SS
OUT
BE
=
()(
)(
)
()
4
Using the values shown in Figure 10,
RiseTime
ms
==
(
)(
)( )
.
–
47 10
15 10
5
07
5
39
The ramp is linear and rise times in the order of 100ms are
possible. Since the circuit is voltage controlled, the ramp
rate is unaffected by load characteristics and maximum
output current is unchanged. Variants of this circuit can be
used for sequencing multiple regulator outputs.
Dual Output SEPIC Converter
The circuit in Figure 11 generates both positive and
negative 5V outputs with a single piece of magnetics. The
two inductors shown are actually just two windings on a
standard B H Electronics inductor. The topology for the 5V
output is a standard buck converter. The – 5V topology
would be a simple flyback winding coupled to the buck
converter if C4 were not present. C4 creates a SEPIC
(single-ended primary inductance converter) topology
which improves regulation and reduces ripple current in
L1. Without C4, the voltage swing on L1B compared to
L1A would vary due to relative loading and coupling
losses. C4 provides a low impedance path to maintain an
equal voltage swing in L1B, improving regulation. In a
flyback converter, during switch on time, all the converter’s
energy is stored in L1A only, since no current flows in L1B.
At switch off, energy is transferred by magnetic coupling
into L1B, powering the – 5V rail. C4 pulls L1B positive
during switch on time, causing current to flow, and energy
to build in L1B and C4. At switch off, the energy stored in
both L1B and C4 supply the –5V rail. This reduces the
current in L1A and changes L1B current waveform from
square to triangular. For details on this circuit, including
maximum output currents, see Design Note 100.
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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