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參數(shù)資料
| 型號： | LT1679IS#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 5/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP R-R I/O QUAD LN 14SOIC |
| 標準包裝： | 2,500 |
| 放大器類型： | 通用 |
| 電路數(shù)： | 4 |
| 輸出類型： | 滿擺幅 |
| 轉換速率： | 6 V/µs |
| 增益帶寬積： | 20MHz |
| 電流 - 輸入偏壓： | 2nA |
| 電壓 - 輸入偏移： | 20µV |
| 電流 - 電源： | 2.5mA |
| 電流 - 輸出 / 通道： | 35mA |
| 電壓 - 電源，單路/雙路(±)： | 2.7 V ~ 36 V，±1.35 V ~ 18 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 14-SO |
| 包裝： | 帶卷 (TR) |
LT1678/LT1679
13
sn16789 16789fs
Rail-to-Rail Input
The input common mode range for the LT1678/LT1679
can exceed the supplies by at least 100mV. As the
common mode voltage approaches the positive rail (+VS
– 0.7V), the tail current for the input pair (Q1, Q2) is
reduced, which prevents the input pair from saturating
(refer to the Simplified Schematic). The voltage drop
across the load resistors RC1, RC2 is reduced to less than
200mV, degrading the slew rate, bandwidth, voltage
noise, offset voltage and input bias current (the cancella-
tion is shut off).
When the input common mode range goes below 1.5V
above the negative rail, the NPN input pair (Q1, Q2) shuts
off and the PNP input pair (Q8, Q9) turns on. The offset
voltage, input bias current, voltage noise and bandwidth
are also degraded. The graph of Offset Voltage Shift vs
Common Mode shows where the knees occur by display-
ing the change in offset voltage. The change-over points
are temperature dependent; see the graph Common Mode
Range vs Temperature.
Rail-to-Rail Output
The rail-to-rail output swing is achieved by using transis-
tor collectors (Q28, Q29 referring to the Simplified Sche-
matic) instead of customary class A-B emitter followers for
the output stage. The output NPN transistor (Q29) sinks the
current necessary to move the output in the negative direc-
tion. The change in Q29’s base emitter voltage is reflected
directly to the gain node (collectors of Q20 and Q16). For
large sinking currents, the delta VBE of Q29 can dominate
the gain. Figure 7 shows the change in input voltage for a
change in output voltage for different load resistors con-
nected between the supplies. The gain is much higher for
output voltages above ground (Q28 sources current) since
the change in base emitter voltage of Q28 is attenuated by
the gain in the PNP portion of the output stage. Therefore,
for positive output swings (output sourcing current) there
is hardly any change in input voltage for any load resistance.
Highest gain and best linearity are achieved when the output
is sourcing current, which is the case in single supply op-
eration when the load is ground referenced. Figure 8 shows
gains for both sinking and sourcing load currents for a
worst-case load of 600.
–15 –10
–5
0
5
10 15
OUTPUT VOLTAGE (V)
INPUT VOLTAGE
(50V/DIV)
RL = 10k
RL = 600
RL = 1k
16789 F07
TA = 25°C
VS = ±15V
RL CONNECTED TO 0V
MEASURED ON
TEKTRONIX 577
CURVE TRACER
12
03
5
4
OUTPUT VOLTAGE (V)
INPUT VOLTAGE
(10V/DIV)
RL TO 5V
RL TO 0V
16789 F08
VOLTAGE GAIN SINGLE SUPPLY
VS = 5V
RL = 600
MEASURED ON TEKTRONIX 577
CURVE TRACER
Figure 7. Voltage Gain Split Supply
Figure 8. Voltage Gain Single Supply
APPLICATIO S I FOR ATIO
WU
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