參數(shù)資料
型號(hào)： LT1578I
廠商： Linear Technology Corporation
英文描述： CAP 22UF 63V ELECT TG SMD
中文描述： 1.5A的，200kHz降壓型開(kāi)關(guān)穩(wěn)壓器
文件頁(yè)數(shù)： 19/28頁(yè)
文件大?。?/td> 286K
代理商： LT1578I
19
LT1578/LT1578-2.5
APPLICATIO
S I
FOR
ATIO
U
At power-up, when V
C
is being clamped by the FB pin (see
Figure 2, Q2), the sync function is disabled. This allows the
frequency foldback to operate in the shorted output con-
dition. During normal operation, switching frequency is
controlled by the internal oscillator until the FB pin reaches
0.7V, after which the SYNC pin becomes operational. If no
synchronization is required, this pin should be connected
to ground.
W
U
U
THERMAL CALCULATIONS
Power dissipation in the LT1578 chip comes from four
sources: switch DC loss, switch AC loss, boost circuit
current, and input quiescent current. The following formu-
las show how to calculate each of these losses. These
formulas assume continuous mode operation, so they
should not be used for calculating efficiency at light load
currents.
Switch loss:
P
R
V
V
ns I
V
f
SW
SW OUT
OUT
IN
OUT
IN
=
) (
)
+
(
)( )( )
2
60
Boost current loss:
P
V
I
V
BOOST
OUT
OUT
IN
=
(
)
2
50
/
Quiescent current loss:
P
V
V
V
V
Q
IN
OUT
OUT
IN
=
)
+
(
0 55 10
1 6 10
0 004
3
3
2
R
SW
= Switch resistance (
≈
0.2
)
60ns = Equivalent switch current/voltage overlap time
f = Switch frequency
Example: with V
IN
= 10V, V
OUT
= 5V and I
OUT
= 1A:
P
W
P
W
P
SW
BOOST
Q
=
( )( ) ( )
+
10
01
012
2
( )( )
=
+
=
=
( ) (
)
=
=
+
( ) (
)
=
0 2 1 5
.
60 10
1 10 200 10
0 22
5
1 50
10
0 05
10 0 55 10
.
.
5
0 004
10
0
2
9
3
3
3
2
.
02W
Total power dissipation is 0.22 + 0.05 + 0.02 = 0.29W.
Thermal resistance for LT1578 package is influenced by
the presence of internal or backside planes. With a full
plane under the SO package, thermal resistance will be
about 80
°
C/W. No plane will increase resistance to about
120
°
C/W. To calculate die temperature, add in worst-case
ambient temperature:
T
J
= T
A
+
θ
JA
(P
TOT
)
With the SO-8 package (
θ
JA
= 80
°
C/W), at an ambient
temperature of 50
°
C,
T
J
= 50 + 80 (0.29) = 73.2
°
C
Die temperature is highest at low input voltage, so use
lowest continuous input operating voltage for thermal
calculations.
FREQUENCY COMPENSATION
Loop frequency compensation of switching regulators
can be a rather complicated problem because the reactive
components used to achieve high efficiency also intro-
duce multiple poles into the feedback loop. The inductor
and output capacitor on a conventional step-down con-
verter actually form a resonant tank circuit that can exhibit
peaking and a rapid 180
°
phase shift at the resonant
frequency. By contrast, the LT1578 uses a “current mode”
architecture to help alleviate the phase shift created by the
inductor. The basic connections are shown in Figure 9.
Figure 10 shows a Bode plot of the phase and gain of the
power section of the LT1578, measured from the V
C
pin to
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