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參數(shù)資料
| 型號： | LT1576IS8-SYNC |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | MM,62.5M,BREAKOUT STYLE BULK FO CBL - 24FIBER 100 |
| 中文描述： | 3.5 A SWITCHING REGULATOR, 240 kHz SWITCHING FREQ-MAX, PDSO8 |
| 封裝： | 0.150 INCH, PLASTIC, SOP-8 |
| 文件頁數(shù)： | 3/28頁 |
| 文件大?。?/td> | 290K |
| 代理商： | LT1576IS8-SYNC |
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3
LT1576/LT1576-5
PARAMETER
Minimum Switch Duty Cycle (Note 10)
Switch Frequency
CONDITIONS
MIN
TYP
8
200
MAX
UNITS
%
V
C
Set to Give 50% Duty Cycle
180
160
220
240
0.15
1.0
5.5
3.0
18
50
0.8
2.2
50
75
2.50
0.60
0.7
2.2
400
kHz
kHz
%/V
G
Switch Frequency Line Regulation
Frequency Shifting Threshold on FB Pin
Minimum Input Voltage (Note 3)
Minimum Boost Voltage (Note 4)
Boost Current (Note 5)
5V
≤
V
IN
≤
25V
f = 10kHz
G
0
G
0.4
0.74
5.0
2.3
9
27
0.55
1.6
20
V
V
V
G
I
SW
≤
1.5A
I
SW
= 0.5A
I
SW
= 1.5A
V
BIAS
= 5V
V
BIAS
= 5V
V
SHDN
= 0V, V
IN
≤
25V, V
SW
= 0V, V
C
Open
G
G
G
mA
mA
mA
mA
μ
A
μ
A
V
IN
Supply Current (Note 6)
BIAS Supply Current (Note 6)
Shutdown Supply Current
G
G
G
Lockout Threshold
Shutdown Thresholds
V
C
Open
V
C
Open Device Shutting Down
Device Starting Up
G
2.34
0.13
0.25
2.42
0.37
0.45
1.5
V
V
V
V
G
G
Synchronization Threshold
Synchronizing Range
SYNC Pin Input Resistance
250
kHz
k
40
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
Gain is measured with a V
C
swing equal to 200mV above the
switching threshold level to 200mV below the upper clamp level.
Note 3:
Minimum input voltage is not measured directly, but is guaranteed
by other tests. It is defined as the voltage where internal bias lines are still
regulated so that the reference voltage and oscillator frequency remain
constant. Actual minimum input voltage to maintain a regulated output will
depend on output voltage and load current. See Applications Information.
Note 4:
This is the minimum voltage across the boost capacitor needed to
guarantee full saturation of the internal power switch.
Note 5:
Boost current is the current flowing into the boost pin with the pin
held 5V above input voltage. It flows only during switch on time.
Note 6:
V
IN
supply current is the current drawn when the BIAS pin is held
at 5V and switching is disabled. Total input referred supply current is
calculated by summing input supply current (I
SI
) with a fraction of BIAS
supply current (I
SB
)
I
TOT
= I
SI
+ (I
SB
)(V
BIAS
/V
IN
)(1.15)
with V
IN
= 15V, V
BIAS
= 5V, I
SI
= 0.55mA, I
SB
= 1.6mA and I
TOT
= 1.16mA.
If the BIAS pin is unavailable or open circuit, the sum of V
IN
and BIAS
supply currents will be drawn by the V
IN
pin.
Note 7:
Switch on resistance is calculated by dividing V
IN
to V
SW
voltage
by the forced current (1.5A). See Typical Performance Characteristics for
the graph of switch voltage at other currents.
Note 8:
Transconductance and voltage gain refer to the internal amplifier
exclusive of the voltage divider. To calculate gain and transconductance,
refer to the SENSE pin on the fixed voltage parts. Divide values shown by
the ratio V
OUT
/1.21.
Note 9:
Slope compensation is the current subtracted from the switch
current limit at 80% duty cycle. See Maximum Output Load Current in the
Applications Information section for further details.
Note 10:
Minimum on-time is 400ns typical. For a 200kHz operating
frequency this means the minimum duty cycle is 8%. In frequency
foldback mode, the effective duty cycle will be less than 8%.
ELECTRICAL CHARACTERISTICS
The
G
denotes specifications which apply over the full operating temperature
range, otherwise specifications are T
A
, T
J
= 25
°
C, V
IN
= 15V, V
C
= 1.5V, Boost = V
IN
+ 5V, switch open, unless otherwise noted.
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