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參數(shù)資料
| 型號(hào)： | LT1464ACN8#PBF |
| 廠商： | Linear Technology |
| 文件頁(yè)數(shù)： | 7/12頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC OP-AMP JFET INPUT DUAL 8-DIP |
| 標(biāo)準(zhǔn)包裝： | 50 |
| 系列： | C-Load™ |
| 放大器類型： | J-FET |
| 電路數(shù)： | 2 |
| 轉(zhuǎn)換速率： | 0.9 V/µs |
| 增益帶寬積： | 1MHz |
| 電流 - 輸入偏壓： | 0.5pA |
| 電壓 - 輸入偏移： | 600µV |
| 電流 - 電源： | 145µA |
| 電壓 - 電源，單路/雙路(±)： | ±5 V ~ 15 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 8-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 8-PDIP |
| 包裝： | 管件 |
4
LT1464/LT1465
ELECTRICAL CHARACTERISTICS VS = ±15V, VCM = 0V, 0°C ≤ TA ≤ 70°C, unless otherwise noted.
LT1464AC
LT1464C/LT1465C
SYMBOL
PARAMETER
CONDITIONS (Note 1)
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
CMRR
Common Mode Rejection Match
(Notes 5, 7)
q
73
84
70
84
dB
PSRR
Power Supply Rejection Match
(Notes 5, 7)
q
77
85
73
85
dB
VS = ±15V, VCM = 0V, –40°C ≤ TA ≤ 85°C (Note 2), unless otherwise noted.
LT1464AC
LT1464C/LT1465C
SYMBOL
PARAMETER
CONDITIONS (Note 1)
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
VOS
Input Offset Voltage
VS = ±5V
q
0.6
1.5
0.6
1.5
mV
VS = ±15V
q
1.0
3.0
1.0
3.0
mV
VOS
Average Input Offset Voltage Drift
(Note 6)
q
720
7
20
V/°C
Temp
IOS
Input Offset Current
q
40
150
60
700
pA
IB
Input Bias Current
q
200
500
300
2500
pA
CMRR
Common Mode Rejection Ratio
VCM = –12V to 15V
q
74
84
72
84
dB
PSRR
Power Supply Rejection Ratio
VS = ±3V to ±20V
q
79
88
76
88
dB
AVOL
Large-Signal Voltage Gain
VO = ±10V, RL = 10k
q
175
400
175
400
V/mV
VO = ±10V, RL = 2k
q
80
250
80
250
V/mV
VS = ±5V, VO = ±2V, RL = 10k
q
70
180
70
180
V/mV
VS = ±5V, VO = ±1V, RL = 2k
q
45
140
45
140
V/mV
VOUT
Output Voltage Swing
RL = 10k
q
±13.2 ±13.4
V
RL = 2k
q
±13.0 ±13.2
V
VS = ±5V, RL = 2k
q
±3.2
±3.4
±3.2
±3.4
V
SR
Slew Rate
RL = 10k (Note 4)
q
0.35
0.7
0.35
0.7
V/
s
GBW
Gain Bandwidth Product
f = 10kHz
q
510
850
510
850
kHz
IS
Supply Current per Amplifier
q
165
230
165
230
A
VS = ±5V
q
160
230
160
230
A
VOS
Offset Voltage Match (Note 7)
VS = ±5V
q
0.8
2.5
0.8
2.5
mV
VS = ±15V
q
1.0
4.0
1.0
4.0
mV
IB+
Noninverting Bias Current Match
q
20
100
70
800
pA
(Note 7)
CMRR
Common Mode Rejection Match
(Notes 5, 7)
q
72
83
69
83
dB
PSRR
Power Supply Rejection Match
(Notes 5, 7)
q
76
81
73
81
dB
The q denotes specifications which apply over the full operating
temperature range.
Note 1: Typical parameters are defined as 60% yield of parameter
distributions of individual amplifiers, i.e., out of 100 LT1465s (or 100
LT1464s) typically 240 op amps (or 120) will be better than the indicated
specification.
Note 2: The LT1464 and LT1465 are designed, characterized and expected
to meet these extended temperature limits, but are not tested at – 40
°C
and 85
°C. Guaranteed I grade parts are available, consult factory.
Note 3: Current noise is calculated from the formula: in = (2qib)1/2 where
q = (1.6)(10)–19 coulomb. The noise of source resistors up to 1G
swamps the contribution of current noise.
Note 4: Slew rate is measured in AV = –1; input signal is ±7.5V, output is
measured at
±2.5V.
Note 5:
CMRR and PSRR are defined as follows:
1. CMRR and PSRR are measured in
V/V on the individual amplifiers.
2. The difference is calculated between the matching sides in
V/V.
3. The result is converted to dB.
Note 6: This parameter is not 100% tested.
Note 7: Matching parameters are the difference between amplifiers A and
D and between B and C on the LT1465; between the two amplifiers on the
LT1464.
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