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參數(shù)資料
| 型號(hào)： | LT1431CN8 |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | Programmable Reference |
| 中文描述： | 1-OUTPUT TWO TERM VOLTAGE REFERENCE, 2.5 V, PDIP8 |
| 封裝： | 0.300 INCH, PLASTIC, DIP-8 |
| 文件頁數(shù)： | 5/12頁 |
| 文件大?。?/td> | 272K |
| 代理商： | LT1431CN8 |
5
LT1431
PI FU
COLL (Pin 1):
Open collector of the output transistor. The
maximum pin voltage is 26V. The saturation voltage at
100mA is approximately 1V.
COMP (Pin 2):
Base of the driver for the output transistor.
This pin allows additional compensation for complex
feedback systems and shutdown of the regulator. It must
be left open if unused.
V
+
(Pin 3):
Bias voltage for the entire shunt regulator. The
maximum input voltage is 36V and the minimum to
operate is equal to V
REF
(2.5V). The quiescent current is
typically 0.6mA.
R
TOP
(Pin 4):
Top of the on-chip 5k-5k resistive divider
that guarantees 1% accuracy of operation as a 5V shunt
regulator with no external trim. The pin is tied to COLL for
self-contained 5V operation. It may be left open if unused.
See note on parasitic diodes below.
GND-S (Pin 5):
Ground reference for the on-chip resistive
divider and shunt regulator circuitry except for the output
transistor. This pin allows external current limit of the
output transistor with one resistor between GND-F (force)
and GND-S (sense).
GND-F (Pin 6):
Emitter of the output transistor and sub-
strate connection for the die.
U
R
MID
(Pin 7):
Middle of the on-chip resistive divider string
between R
TOP
and GND-S. The pin is tied to REF for self-
contained 5V operation. It may be left open if unused.
REF (Pin 8):
Control pin of the shunt regulator with a 2.5V
threshold. If V
+
> 3V, input bias current cancellation
reduces I
B
to 0.2
μ
A typical.
COMP, R
TOP
, R
MID
, and REF have static discharge protec-
tion circuits that must not be activated on a continuous
basis. Therefore, the absolute maximum DC voltage on
these pins is 6V, well beyond the normal operating condi-
tions.
As with all bipolar ICs, the LT1431 contains parasitic
diodes which must not be forward biased or else anoma-
lous behavior will result. Pin conditions to be avoided are
R
TOP
below R
MID
in voltage and any pin below GND-F in
voltage (except for GND-S).
The following pin definitions apply to the Z package.
CATHODE (Pin 1):
Corresponds to COLL and V
+
tied
together.
ANODE (Pin 2):
Corresponds to GND-S and GND-F tied
together.
REF (Pin 3):
Corresponds to REF.
W
IAGRA
BLOCK
LT1431 BD01
COMP
V+
GND-FORCE
GND-SENSE
R
TOP
REF
R
MID
2.5V
+
–
gm =
4mA/V
5k
COLLECTOR
8
7
5
4
3
2
1
6
5k
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| LT1431CS8 | Programmable Reference |
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| LT1431I | Programmable Reference |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LT1431CN8#PBF | 功能描述:IC VREF SHUNT ADJ 8-PDIP RoHS:是 類別:集成電路 (IC) >> PMIC - 電壓基準(zhǔn) 系列:- 產(chǎn)品培訓(xùn)模塊:Voltage Reference Basics 標(biāo)準(zhǔn)包裝:100 系列:- 基準(zhǔn)類型:旁路，精度 輸出電壓:4.096V 容差:±0.075% 溫度系數(shù):50ppm/°C 輸入電壓:- 通道數(shù):1 電流 - 陰極:1µA 電流 - 靜態(tài):- 電流 - 輸出:10mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOIC 包裝:管件 |
| LT1431CN8#PBF | 制造商:Linear Technology 功能描述:IC DRIVER OPTO DIP8 1431 制造商:Linear Technology 功能描述:IC, DRIVER, OPTO, DIP8, 1431 |
| LT1431CN8-PBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:Programmable Reference |
| LT1431CN8-TRPBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:Programmable Reference |
| LT1431CS8 | 功能描述:IC VREF SHUNT ADJ 8-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 電壓基準(zhǔn) 系列:- 產(chǎn)品培訓(xùn)模塊:Voltage Reference Basics 標(biāo)準(zhǔn)包裝:100 系列:- 基準(zhǔn)類型:旁路，精度 輸出電壓:4.096V 容差:±0.075% 溫度系數(shù):50ppm/°C 輸入電壓:- 通道數(shù):1 電流 - 陰極:1µA 電流 - 靜態(tài):- 電流 - 輸出:10mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOIC 包裝:管件 |
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