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參數(shù)資料
| 型號： | LT1370HV |
| 廠商： | Linear Technology Corporation |
| 英文描述： | Octal D-Type Edge-Triggered Flip-Flops With 3-State Outputs 20-SOIC 0 to 70 |
| 中文描述： | 500kHz的高效率6A條開關穩(wěn)壓器 |
| 文件頁數(shù)： | 10/16頁 |
| 文件大?。?/td> | 293K |
| 代理商： | LT1370HV |
10
LT1370
APPLICATIU
Input Capacitors
The input capacitor of a boost converter is less critical due
to the fact that the input current waveform is triangular and
does not contain large squarewave currents as is found in
the output capacitor. Capacitors in the range of 10
μ
F to
100
μ
F with an ESR of 0.1
or less work well up to full 6A
switch current. Higher ESR capacitors may be acceptable
at low switch currents. Input capacitor ripple current for a
boost converter is :
U
W
U
Output Diode
The suggested output diode (D1) is a Motorola MBRD835L.
It is rated at 8A average forward current and 35V reverse
voltage. Typical forward voltage is 0.4V at 3A. The diode
conducts current only during switch OFF time. Peak re-
verse voltage for boost converters is equal to regulator
output voltage. Average forward current in normal opera-
tion is equal to output current.
Frequency Compensation
Loop frequency compensation is performed on the output
of the error amplifier (V
C
pin) with a series RC network.
The main pole is formed by the series capacitor and the
output impedance (
≈
500k
) of the error amplifier. The
pole falls in the range of 2Hz to 20Hz. The series resistor
creates a “zero” at 1kHz to 5kHz, which improves loop
stability and transient response. A second capacitor, typi-
cally one-tenth the size of the main compensation capaci-
tor, is sometimes used to reduce the switching frequency
ripple on the V
C
pin. V
C
pin ripple is caused by output
voltage ripple attenuated by the output divider and multi-
plied by the error amplifier. Without the second capacitor,
V
C
pin ripple is:
V
C
Pin Ripple =
V
RIPPLE
= Output ripple (V
P–P
)
g
m
= Error amplifier transconductance
(
≈
1500
μ
mho)
R
C
= Series resistor on V
C
pin
V
OUT
= DC output voltage
1.245(V
RIPPLE
)(g
m
)(R
C
)
(V
OUT
)
To prevent irregular switching, V
C
pin ripple should be
kept below 50mV
P–P
.
Worst-case V
C
pin ripple occurs at
maximum output load current and will also be increased if
poor quality (high ESR) output capacitors are used. The
addition of a 0.0047
μ
F capacitor on the V
C
pin reduces
switching frequency ripple to only a few millivolts. A low
value for R
C
will also reduce V
C
pin ripple, but loop phase
margin may be inadequate.
I
RIPPLE
=
f = 500kHz switching frequency
0.3(V
IN
)(V
OUT
– V
IN
)
(f)(L)(V
OUT
)
The input capacitor can see a very high surge current when
a battery or high capacitance source is connected “l(fā)ive”
and solid tantalum capacitors can fail under this condition.
Several manufacturers have developed tantalum capaci-
tors specially tested for surge capability (AVX TPS series,
for instance) but even these units may fail if the input
voltage approaches the maximum voltage rating of the
capacitor during a high surge. AVX recommends derating
capacitor voltage by 2:1 for high surge applications.
Ceramic, OS-CON and aluminum electrolytic capacitors
may also be used and have a high tolerance to turn-on
surges.
Ceramic Capacitors
Higher value, lower cost ceramic capacitors are now
becoming available in smaller case sizes. These are tempt-
ing for switching regulator use because of their very low
ESR. Unfortunately, the ESR is so low that it can cause
loop stability problems. Solid tantalum capacitor ESR
generates a loop “zero” at 5kHz to 50kHz that is instru-
mental in giving acceptable loop phase margin. Ceramic
capacitors remain capacitive to beyond 300kHz and usu-
ally resonate with their ESL before ESR becomes effective.
They are appropriate for input bypassing because of their
high ripple current ratings and tolerance of turn-on surges.
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