參數(shù)資料
型號: LT1368CS8
廠商: LINEAR TECHNOLOGY CORP
元件分類: 運動控制電子
英文描述: Octal D-Type Transparent Latches With 3-State Outputs 20-PDIP 0 to 70
中文描述: DUAL OP-AMP, 1000 uV OFFSET-MAX, 0.16 MHz BAND WIDTH, PDSO8
封裝: 0.150 INCH, PLASTIC, SO-8
文件頁數(shù): 7/20頁
文件大?。?/td> 411K
代理商: LT1368CS8
7
LT1366/LT1367
LT1368/LT1369
ELECTRICAL CHARACTERISTICS
0
°
C < T
A
< 70
°
C, V
S
=
±
15V, V
CM
= 0V, V
O
= 0V, unless otherwise noted.
SYMBOL
V
OS
PARAMETER
Input Offset Voltage (LT1366/LT1368)
CONDITIONS
V
CM
= V
CC
V
CM
= V
EE
V
CM
= V
CC
V
CM
= V
EE
V
CM
= V
EE
to V
CC
V
CM
= V
EE
, V
CC
(Notes 3, 4)
V
CM
= V
EE
to V
CC
V
CM
= V
EE
, V
CC
(Notes 3, 4)
(Note 2)
V
CM
= V
CC
V
CM
= V
EE
V
CM
= V
EE
to V
CC
V
CM
= V
CC
V
CM
= V
EE
V
CM
= V
EE
to V
CC
V
CM
= V
CC
(Note 3)
V
CM
= V
EE
(Note 3)
V
O
= –14.7V to 14.7V, R
L
= 10k
V
O
= –10V to 10V, R
L
= 2k
V
O
= –10V to 10V, R
L
= 2k
V
CM
= V
EE
to V
CC
V
CM
= V
EE
to V
CC
(Note 3)
V
CM
= V
EE
to V
CC
V
CM
= V
EE
to V
CC
(Note 3)
V
S
=
±
5V to
±
15V
V
S
=
±
5V to
±
15V (Note 3)
No Load
I
SINK
= 0.5mA
I
SINK
= 10mA
No Load
I
SOURCE
= 0.5mA
I
SOURCE
= 10mA
(Note 1)
MIN
TYP
250
250
250
250
200
300
200
300
2
15
–10
25
2
1
2
2
1
6000
6000
135
103
103
103
103
105
100
MAX
850
850
1150
1000
525
1500
750
2300
8
45
0
90
15
15
15
15
15
UNITS
G
G
μ
V
μ
V
μ
V
μ
V
μ
V
μ
V
μ
V
μ
V
Input Offset Voltage (LT1367/LT1369)
G
G
V
OS
Input Offset Voltage Shift (LT1366/LT1368)
Input Offset Voltage Match (Channel to Channel)
Input Offset Voltage Shift (LT1367/LT1369)
Input Offset Voltage Match (Channel to Channel)
Input Offset Voltage Drift
Input Bias Current
G
G
G
G
V
OS
TC
I
B
G
μ
V/
°
C
G
G
0
nA
nA
nA
nA
nA
nA
nA
nA
–45
I
B
I
OS
Input Bias Current Shift
Input Offset Current
G
G
G
I
OS
Input Offset Current Shift
Input Bias Current Match (Channel to Channel)
G
G
G
0
0
A
VOL
Large-Signal Voltage Gain
G
G
750
500
110
95
89
92
86
80
75
V/mV
V/mV
Channel Separation
Common Mode Rejection Ratio (LT1366/LT1368)
CMRR Match (Channel to Channel)
Common Mode Rejection Ratio (LT1367/LT1369)
CMRR Match (Channel to Channel)
Power Supply Rejection Ratio
PSRR Match (Channel to Channel)
Output Voltage Swing LOW
G
dB
dB
dB
dB
dB
dB
dB
V
V
V
V
V
V
mA
μ
A
CMRR
G
G
G
G
PSRR
G
G
V
OL
G
G
G
V
EE
+ 0.009 V
EE
+ 0.014
V
EE
+ 0.045 V
EE
+ 0.080
V
EE
+ 0.300 V
EE
+ 0.600
V
OH
Output Voltage Swing HIGH
G
V
CC
– 0.014 V
CC
– 0.005
G
V
CC
– 0.11 V
CC
– 0.055
G
V
CC
– 0.95 V
CC
– 0.500
G
±
30
I
SC
I
S
Short-Circuit Current
Supply Current per Amplifier
G
415
575
Note 2:
This parameter is not 100% tested.
Note 3:
Matching parameters are the difference between amplifiers A and
D and between B and C on the LT1367/LT1369; between the two amplifiers
on the LT1366/LT1368.
Note 4:
Input offset voltage match is the difference in offset voltage
between amplifiers measured at both V
CM
= V
EE
and V
CM
= V
CC
.
The
G
denotes specifications that apply over the full operating temperature
range.
Note 1:
Applies to short circuits to ground for all split supplies and for
single supplies less than 20V. Short circuits to either supply for supplies
greater than 20V total may permanently damage the part. A heat sink may
be required to keep the junction temperature below the absolute maximum
rating when the output is shorted indefinitely.
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