參數(shù)資料
型號: LT1339C
廠商: Linear Technology Corporation
英文描述: Octal Buffers/Drivers With 3-State Outputs 20-SOIC 0 to 70
中文描述: 大功率同步DC / DC控制器
文件頁數(shù): 14/20頁
文件大小: 415K
代理商: LT1339C
14
LT1339
APPLICATIO
S I
N
FOR
ATIO
U
)
(
Since L = 5
μ
H is less than L
MIN
, additional slope compen-
sation is necessary. The total slope compensation
required is:
W
U
R
SL1
= 45k and R
SL2
= 30k sets the desired reference
voltage and has a R
EQ
of 18k, which meets both design
requirements. Figure 7b shows the slope compensation
effective waveforms both with and without the SL/ADJ
external resistors.
Power MOSFET and Catch Diode Selection
External N-channel MOSFET switches are used with the
LT1339. The positive gate-source drive voltage of the
LT1339 for both switches is roughly equivalent to the
12V
IN
supply voltage, so standard threshold MOSFETs
can be used.
Selection criteria for the power MOSFETs include the “ON”
resistance (R
DS(ON)
), reverse transfer capacitance (C
RSS
),
maximum drain-source voltage (V
DSS
) and maximum
output current.
The power FETs selected must have a maximum operating
V
DSS
exceeding the maximum V
IN
. V
GS
voltage maximum
must exceed the 12V
IN
supply voltage.
Once voltage requirements have been determined, R
DS(ON)
can be selected based on allowable power dissipation and
required output current.
In an LT1339 buck converter, the average inductor current
is equal to the DC load current. The average currents
through the main and synchronous switches are:
I
MAIN
= (I
LOAD
)(DC)
I
SYNC
= (I
LOAD
)(1 – DC)
The R
DS(ON)
required for a given conduction loss can be
calculated using the relation:
P
LOSS
= (I
SWITCH
)
2
(R
DS(ON)
)
In high voltage applications (V
IN
> 20V), the topside switch
is required to slew very large voltages. As V
IN
increases,
transition losses increase through a square relation, until
it becomes the dominant power loss term in the main
switch. This transition loss takes the form:
P
TR
(k)(V
IN
)
2
(I
MAX
)(C
RSS
)(f
O
)
where k is a constant inversely related to the gate drive
current, approximated by k = 2 in LT1339 applications.
L
V
H
MIN
(
(
)
)
(
)
)(
=
μ
20
0 01
1 5 1
0 084 100000
.
11 9
S
V
H
X
μ
(
)
=
( )
20
5
1 5 1
2 10
6
Amp/s
Subtracting the internally generated slope compensation
and solving for the required effective resistance at SL/ADJ
yields:
(
( )
R
f
R
f
k
EQ
O
SENSE
O
)( )
)
(
(
)( )
=
2500
2 10
0 084
21 5
6
Setting the resistor divider reference voltage at 2V assures
that the additional compensation waveform will be
enabled at 75% duty cycle. As shown in Figure 7a, using
R
SL2
30k
R
SL1
45k
1339 F07a
5V
REF
LT1339
2
SL/ADJ
4
Figure 7a. External Slope Compensation Resistors
Figure 7b. Slope Compensation Waveforms
(0.084 + 0.139)(f
O
)
R
SENSE
(0.084)(f
O
)
R
SENSE
2.5V
2V
0.8V
DC = 0.75
1339 F07b
相關(guān)PDF資料
PDF描述
LT1339 High Efficiency, Synchronous, 4-Switch Buck-Boost Controller
LT1339CN Octal Buffers/Drivers With 3-State Outputs 20-SOIC 0 to 70
LT1339CSW Octal Buffers/Drivers With 3-State Outputs 20-SOIC 0 to 70
LT1339I Octal Buffers/Drivers With 3-State Outputs 20-SOIC 0 to 70
LT1339IN Octal Buffers/Drivers With 3-State Outputs 20-PDIP 0 to 70
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