參數(shù)資料
型號(hào): LT1336IS
廠商: LINEAR TECHNOLOGY CORP
元件分類: MOSFETs
英文描述: Octal D-Type Edge-Triggered Flip-Flops With 3-State Outputs 20-SO 0 to 70
中文描述: 1.5 A HALF BRDG BASED MOSFET DRIVER, PDSO16
封裝: 0.150 INCH, PLASTIC, SO-16
文件頁(yè)數(shù): 12/16頁(yè)
文件大?。?/td> 365K
代理商: LT1336IS
12
LT1336
APPLICATIO
S I
FOR
ATIO
U
Paralleling MOSFETs
When the above calculations result in a lower R
DS(ON)
than
is economically feasible with a single MOSFET, two or
more MOSFETs can be paralleled. The MOSFETs will
inherently share the currents according to their R
DS(ON)
ratio as long as they are thermally connected (e.g., on a
common heat sink). The LT1336 top and bottom drivers
can each drive five power MOSFETs in parallel with only a
small loss in switching speeds (see Typical Performance
Characteristics). A low value resistor (10
to 47
) in
series with each individual MOSFET gate may be required
to “decouple” each MOSFET from its neighbors to prevent
high frequency oscillations (consult manufacturer’s rec-
ommendations). If gate decoupling resistors are used, the
corresponding Gate Feedback pin can be connected to any
one of the gates as shown in Figure 3.
Driving multiple MOSFETs in parallel may restrict the
operating frequency to prevent overdissipation in the
LT1336 (see the following Gate Charge and Driver
Dissipation).
W
U
U
The actual increase in supply current is slightly higher due
to LT1336 switching losses and the fact that the gates are
being charged to more than 10V. Supply Current vs
Switching Frequency is given in the Typical Performance
Characteristics.
The LT1336 junction temperature can be estimated by
using the equations given in Note 1 of the Electrical
Characteristics. For example, the LT1336IS is limited to
less than 31mA from a 12V supply:
T
J
= 85
°
C + (31mA)(12V)(110
°
C/W)
= 126
°
C exceeds absolute maximum
In order to prevent the maximum junction temperature
from being exceeded, the LT1336 supply current must be
verified while driving the full complement of the chosen
MOSFET type at the maximum switching frequency.
Ugly Transient Issues
In PWM applications the drain current of the top MOSFET
is a square wave at the input frequency and duty cycle. To
prevent large voltage transients at the top drain, a low ESR
electrolytic capacitor must be used and returned to the
power ground. The capacitor is generally in the range of
25
μ
F to 5000
μ
F and must be physically sized for the RMS
current flowing in the drain to prevent heating and prema-
ture failure. In addition, the LT1336 requires a separate
10
μ
F capacitor connected closely between Pins 2 and 6.
The LT1336 top source is internally protected against
transients below ground and above supply. However, the
Gate Drive pins cannot be forced below ground. In most
applications, negative transients coupled from the source
to the gate of the top MOSFET do not cause any problems.
Switching Regulator Applications
The LT1336 is ideal as a synchronous switch driver to
improve the efficiency of step-down (buck) switching
regulators. Most step-down regulators use a high current
Schottky diode to conduct the inductor current when the
switch is off. The fractions of the oscillator period that the
switch is on (switch conducting) and off (diode conduct-
ing) are given by:
Figure 3. Paralleling MOSFETs
GATEDR
GATEFB
LT1336
R
G
*
R
G
*
HV
*OPTIONAL 10
1336 F03
+
Gate Charge and Driver Dissipation
A useful indicator of the load presented to the driver by a
power MOSFET is the total gate charge Q
G
, which includes
the additional charge required by the gate-to-drain swing.
Q
G
is usually specified for V
GS
= 10V and V
DS
= 0.8V
DS(MAX)
.
When the supply current is measured in a switching
application, it will be larger than given by the DC electrical
characteristics because of the additional supply current
associated with sourcing the MOSFET gate charge:
I
I
dQ
dt
dQ
dt
SUPPLY
DC
G
TOP
G
BOTTOM
=
+
+
相關(guān)PDF資料
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