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參數(shù)資料
| 型號： | LT1259IN#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 11/12頁 |
| 文件大小： | 0K |
| 描述： | IC AMP DUAL CURR FDBK SHDN 14DIP |
| 標(biāo)準(zhǔn)包裝： | 25 |
| 放大器類型： | 電流反饋 |
| 電路數(shù)： | 2 |
| 轉(zhuǎn)換速率： | 1600 V/µs |
| -3db帶寬： | 130MHz |
| 電流 - 輸入偏壓： | 20µA |
| 電壓 - 輸入偏移： | 2000µV |
| 電流 - 電源： | 5mA |
| 電流 - 輸出 / 通道： | 60mA |
| 電壓 - 電源，單路/雙路(±)： | 4 V ~ 30 V，±2 V ~ 15 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 14-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 14-PDIP |
| 包裝： | 管件 |
8
LT1259/LT1260
Enable/Disable
The LT1259/LT1260 amplifiers have a unique high imped-
ance, zero supply current mode which is controlled by
independent EN pins. When disabled, an amplifier output
The input slew rate of the LT1259/LT1260 is approxi-
mately 270V/
s and is set by internal currents and capaci-
tances. The output slew rate is set by the value of the
feedback resistors and internal capacitances. At a gain of
10 with at 1k feedback resistor and
±15V supplies, the
output slew rate is typically 1600V/
s. Larger feedback
resistors will reduce the slew rate as will lower supply
voltages, similar to the way the bandwidth is reduced.
The graph of Maximum Undistorted Output vs Frequency
relates the slew rate limitations to sinusoidal input for
various gains.
looks like a 4.4pF capacitor in parallel with a 75k resistor,
excluding feedback resistor effects. These amplifiers are
designed to operate with open drain logic: the EN pins have
internal pullups and the amplifiers draw zero current when
these pins are high. To activate an amplifier, its EN pin is
pulled to ground (or at least 2V below the positive supply).
The enable pin current is approximately 60
A when
activated. Input referred switching transients with no
input signal applied are only 35mV positive and 80mV
negative with RL = 100.
Amplifier Enable Time, AV = 10
VS = ±5V
VIN = 0.1V
LT1259/LT1260 AI04
RF = 1k
RG = 110
RL = 150
The enable/disable times are very fast when driven from
standard 5V logic. The amplifier enables in about 100ns
(50% point to 50% point) while operating on
±5V sup-
plies. Likewise the disable time is approximately 40ns
(50% point to 50% point) or 75ns to 90% of the final
value. The output decay time is set by the output capaci-
tance and load resistor.
Large-Signal Transient Response, AV = 2
VS = ±15V
RF = RG = 1.6k
LT1259/LT1260 AI01
RL = 400
Large-Signal Transient Response, AV = 10
VS = ±15V
RF = 1k
LT1259/LT1260 AI02
RG = 110
RL = 400
OUTPUT
EN
VS = ±5V
VIN = 0V
Output Switching Transient
LT1259/LT1260 AI03
RF = RG = 1.6k
RL = 100
OUTPUT
EN
APPLICATIO S I FOR ATIO
WU
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| LT1259IS#TR | 功能描述:IC AMP DUAL CURR FDBK SD 14SOIC RoHS:否 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 放大器類型:通用 電路數(shù):1 輸出類型:- 轉(zhuǎn)換速率:0.2 V/µs 增益帶寬積:- -3db帶寬:- 電流 - 輸入偏壓:100pA 電壓 - 輸入偏移:30µV 電流 - 電源:380µA 電流 - 輸出 / 通道:- 電壓 - 電源，單路/雙路(±):±2 V ~ 18 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SO 包裝:管件 |
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