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參數(shù)資料
| 型號(hào)： | LT1195CN8#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 7/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OP-AMP LOW-PWR HI-SPEED 8-DIP |
| 標(biāo)準(zhǔn)包裝： | 50 |
| 應(yīng)用： | 通用 |
| 電路數(shù)： | 1 |
| 轉(zhuǎn)換速率： | 165 V/µs |
| 電流 - 電源： | 12mA |
| 電流 - 輸出 / 通道： | 20mA |
| 電壓 - 電源，單路/雙路(±)： | 4.75 V ~ 16 V，±2.38 V ~ 8 V |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 8-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 8-PDIP |
| 包裝： | 管件 |
4
LT1195
1195fa
LT1195C
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VOS
Input Offset Voltage
J8, N8 Package
1.0
10.0
mV
S8 Package
1.0
15.0
mV
VOS/T
Input VOS Drift
15
V/°C
IOS
Input Offset Current
0.2
1.7
A
IB
Input Bias Current
±0.5
±2.5
A
Input Voltage Range
(Note 4)
2.0
3.5
V
CMRR
Common Mode Rejection Ratio
VCM = 2V to 3.5V
60
85
dB
VOUT
Output Voltage Swing
RL = 150 to Ground
VOUT High
3.5
3.75
V
VOUT Low
0.15
0.4
V
IS
Supply Current
12
16
mA
Shutdown Supply Current
Pin 5 at V– (Note 9)
0.9
2.0
mA
IS/D
Shutdown Pin Current
Pin 5 at V–
525
A
LT1195C
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VOS
Input Offset Voltage
J8, N8 Package
3.0
10.0
mV
S8 Package
3.0
15.0
mV
VOS/T
Input VOS Drift
12
V/°C
IOS
Input Offset Current
0.2
1.7
A
IB
Input Bias Current
±0.5
±2.5
A
CMRR
Common Mode Rejection Ratio
VCM = –2.5V to 3.5V
60
85
dB
PSRR
Power Supply Rejection Ratio
VS = ±2.375V to ±5V
60
90
dB
AVOL
Large-Signal Voltage Gain
RL = 1k, VOUT = ±3V
2.0
7.5
V/mV
RL = 150, VOUT = ±3V
0.3
1.5
V/mV
VOUT
Output Voltage Swing
RL = 1k
±3.7
±3.9
V
IS
Supply Current
12
17
mA
Shutdown Supply Current
Pin 5 at V – (Note 9)
0.9
2.0
mA
IS/D
Shutdown Pin Current
Pin 5 at V –
525
A
0°C ≤ TA ≤ 70°C
VS = ±5V, Pin 5 open circuit, unless otherwise noted.
0°C ≤ TA ≤ 70°C
VS+ = 5V, VS– = OV, Pin 5 open circuit, unless otherwise noted.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: A heat sink may be required to keep the junction temperature
below absolute maximum when the output is shorted continuously.
Note 3: TJ is calculated from the ambient temperature TA and power
dissipation PD according to the following formats:
LT1195MJ8/LT1195CJ8:
TJ = TA + (PD 100°C/W)
LT1195N:
TJ = TA + (PD 100°C/W)
LT1195CS:
TJ = TA + (PD 150°C/W)
Note 4: Exceeding the input common mode range may cause the output
to invert.
Note 5: Slew rate is measured between ±1V on the output, with ±3V input
step.
Note 6: Full power bandwidth is calculated from the slew rate
measurement: FPBW = SR/2πVP.
Note 7: Settling time measurement techniques are shown in “Take the
Guesswork Out of Settling Time Measurements,” EDN, September 19, 1985.
Note 8: NTSC (3.58MHz). For RL = 1k, Diff AV = 0.3%, Diff Ph = 0.35°.
Note 9: See Applications Information section for shutdown at elevated
temperatures. Do not operate the shutdown above TJ > 125°C.
Note 10: AC parameters are 100% tested on the ceramic and plastic DIP
packaged parts (J8 and N8 suffix) and are sample tested on every lot of
the SO packaged parts (S8 suffix).
Note 11: Do not operate at AV < 2 for TA < 0°C.
5V ELECTRICAL CHARACTERISTICS
+
–
5V ELECTRICAL CHARACTERISTICS
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