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參數(shù)資料
| 型號： | LT1169CS8#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 7/12頁 |
| 文件大小： | 0K |
| 描述： | IC OPAMP JFET LONOISE DUAL 8SOIC |
| 標準包裝： | 2,500 |
| 放大器類型： | J-FET |
| 電路數(shù)： | 2 |
| 轉換速率： | 4.2 V/µs |
| 增益帶寬積： | 5.3MHz |
| 電流 - 輸入偏壓： | 4pA |
| 電壓 - 輸入偏移： | 600µV |
| 電流 - 電源： | 5.3mA |
| 電壓 - 電源，單路/雙路(±)： | ±4.5 V ~ 20 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 8-SO |
| 包裝： | 帶卷 (TR) |
4
LT1169
ELECTRICAL C
C
HARA TERISTICS V
S = ±15V, VCM = 0V, – 40°C ≤ TA ≤ 85°C, (Note 7), unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS (Note 1)
MIN
TYP
MAX
UNITS
VOS
Offset Voltage Match
q
1.8
6
mV
IB+
Noninverting Bias Current Match
q
10
180
pA
CMRR
Common Mode Rejection Match
(Note 8)
q
73
93
dB
PSRR
Power Supply Rejection Match
(Note 8)
q
75
92
dB
The q denotes specifications which apply over the full operating
temperature range.
Note 1: Typical parameters are defined as the 60% yield of parameter
distributions of individual amplifiers, i.e., out of 100 LT1169s (200 op
amps) typically 120 op amps will be better than the indicated specification.
Note 2: IB and IOS readings are extrapolated to a warmed-up temperature
from 25
°C measurements and 45°C characterization data.
Note 3: Current noise is calculated from the formula:
in = (2qIB)
1/2
where q = 1.6
× 10–19 coulomb. The noise of source resistors up to 200M
swamps the contribution of current noise.
Note 4: Input voltage range functionality is assured by testing offset
voltage at the input voltage range limits to a maximum of 2.8mV.
Note 5: This parameter is not 100% tested.
Note 6: Slew rate is measured in AV = –1; input signal is ±7.5V, output
measured at
±2.5V.
Note 7: The LT1169 is designed, characterized and expected to meet these
extended temperature limits, but is not tested at – 40
°C and 85°C.
Guaranteed I grade parts are available; consult factory.
Note 8:
CMRR and PSRR are defined as follows:
(1) CMRR and PSRR are measured in
V/V on the individual
amplifiers.
(2) The difference is calculated between the matching sides in
V/V.
(3) The result is converted to dB.
Note 9: The LT1169 is measured in an automated tester in less than one
second after application of power. Depending on the package used, power
dissipation, heat sinking, and air flow conditions, the fully warmed-up chip
temperature can be 10
°C to 50°C higher than the ambient temperature.
CC
HARA TERISTICS
UW
A
TYPICALPERFOR
CE
Voltage Noise vs Frequency
0.1Hz to 10Hz Voltage Noise
TIME (SEC)
VOLTAGE
NOISE
(1
V/DIV)
24
6
8
LT1169 TPC01
10
0
FREQUENCY (Hz)
1
10
1
10
100
1k
10k
LT1169 TPC03
RMS
VOLTAGE
NOISE
(nV/
√
Hz)
TA = 25°C
VS = ±15V
1/f CORNER
60Hz
TYPICAL
INPUT VOLTAGE NOISE (nV/
√Hz)
4.2
PERCENT
OF
UNITS
(%)
30
40
50
7.4
LT1169 TPC02
20
10
0
5.0
5.8
6.6
4.6
7.8
5.4
6.2
7.0
8.2
TA = 25°C
VS = ±15V
510 OP AMPS TESTED
1kHz Input Noise Voltage
Distribution
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