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參數(shù)資料
| 型號： | LT1112S8#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 13/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PREC OP-AMP LOWPWR DUAL 8SOIC |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 放大器類型： | 通用 |
| 電路數(shù)： | 2 |
| 轉(zhuǎn)換速率： | 0.3 V/µs |
| 增益帶寬積： | 750kHz |
| 電流 - 輸入偏壓： | 100pA |
| 電壓 - 輸入偏移： | 25µV |
| 電流 - 電源： | 350µA |
| 電壓 - 電源，單路/雙路(±)： | 2 V ~ 40 V，±1 V ~ 20 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SO |
| 包裝： | 帶卷 (TR) |
6
LT1112/LT1114
111214fb
Note 5: Offset voltage, supply current and power supply rejection ratio are
measured at the minimum supply voltage.
Note 6: Matching parameters are the difference between amplifiers A and
D and between B and C on the LT1114; between the two amplifiers on the
LT1112.
Note 7: This parameter is the difference between two noninverting input
bias currents.
Note 8:
CMRR and PSRR are defined as follows: (1) CMRR and PSRR
are measured in
V/V on the individual amplifiers. (2) The difference is
calculated between the matching sides in
V/V. (3) The result is converted
to dB.
Note 9: This parameter is not 100% tested.
ELECTRICAL CHARACTERISTICS
Note 10: These parameters are not tested. More than 99% of the op amps
tested during product characterization have passed the maximum limits.
100% passed at 1kHz.
Note 11: The LT1112AC/LT1112C/LT1112S8/LT1112I and LT1114AC/
LT1114C/LT1114S/LT1114I are guaranteed functional over the
temperature range of –40
°C to 85°C.
Note 12: The LT1112AC/LT1112C/LT1112S8/LT1114AC/LT1114C/
LT1114S are guaranteed to meet specified performance from 0
°C to 70°C
and are designed, characterized and expected to meet specified
performance from –40
°C to 85°C, but are not tested or QA sampled at
these temperatures. The LT1112I/LT1114I are guaranteed to meet
specified performance from –40
°C to 85°C.
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Input Bias and Offset Current,
Noninverting Bias Current Match
vs Temperature
TEMPERATURE (
°C)
–75
–200
INPUT
BIAS,
OFFSET,
MATCH
CURRENT
(pA)
–100
0
100
200
–50 –25
0
25
LT1112/14 TPC01
50
75
100 125
IB+
IOS
IB (OVERCANCELLED)
VS = ±15V
IB (UNDERCANCELLED)
Input Bias Current Over
Common Mode Range
Distribution of Input Bias Current
(In All Packages Except LT1114S)
INPUT OFFSET VOLTAGE (
V)
–80
0
PERCENT
OF
UNITS
5
15
20
25
–40
0
20
100
LT1112/14 TPC06
10
–60
–20
40
60
80
30
TA = 25°C
Drift with Temperature
LT1112S8, LT1114N/S
Distribution of Offset Voltage at
VS = ±1.0V (In All Packages)
INPUT BIAS CURRENT (pA)
–300
0
PERCENT
OF
UNITS
10
20
30
–200
–100
0
100
LT1112/14 TPC03
200
300
VS = ±15V
TA = 25°C
Drift with Temperature
LT1112N8/J8, LT1114J
OFFSET VOLTAGE DRIFT WITH TEMPERATURE (
V/°C)
–0.8
PERCENT
OF
INPUTS
10
15
0.8
LT1112/14 TPC04
5
0
–0.4
0
0.4
20
–0.6
–0.2
0.2
0.6
850 OP AMPS TESTED
100 LT1112J8
165 LT1112N8
80 LT1114J
VS = ±15V
COMMON MODE INPUT VOLTAGE (V)
–15
–150
INPUT
BIAS
CURRENT
(pA)
–100
–50
0
50
150
–10
–5
0
5
LT1112/14 TPC02
10
15
100
–
+
IB
VCM
VS = ±15V
TA = 25°C
RINCM = 800G
DEVICE WITH POSITIVE INPUT CURRENT
DEVICE WITH NEGATIVE INPUT CURRENT
OFFSET VOLTAGE DRIFT WITH TEMPERATURE (
V/°C)
–1.4
0
PERCENT
OF
UNITS
10
25
–0.6
0.2
0.6
LT1112/14 TPC05
5
20
15
–1.0
–0.2
1.0
1.4
960 OP AMPS TESTED
240 LT1112S8
80 LT1114N
40 LT1114S
VS = ±15V
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