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參數(shù)資料
| 型號： | LT1011AIS8#TR |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 15/20頁 |
| 文件大小： | 0K |
| 描述： | IC COMPARATOR VOLTAGE 5V 8SOIC |
| 標準包裝： | 2,500 |
| 類型： | 通用 |
| 元件數(shù)： | 1 |
| 輸出類型： | 開路集電極 |
| 電壓 - 電源，單路/雙路(±)： | 3 V ~ 36 V，±1.5 V ~ 18 V |
| 電壓 - 輸入偏移（最小值）： | 0.75mV @ ±15V |
| 電流 - 輸入偏壓（最小值）： | 0.035µA @ ±15V |
| 電流 - 輸出（標準）： | 50mA |
| 電流 - 靜態(tài)（最大值）： | 4mA |
| CMRR, PSRR（標準）： | 115dB CMRR |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 安裝類型： | 表面貼裝 |
| 包裝： | 帶卷 (TR) |
LT1011/LT1011A
4
1011afe
For more information www.linear.com/LT1011
elecTrical characTerisTics
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Inputs may be clamped to supplies with diodes so that
maximum input voltage actually exceeds supply voltage by one diode
drop. See Input Protection in the Applications Information section.
Note 3: TJMAX = 150°C.
Note 4: Output is sinking 1.5mA with VOUT = 0V.
Note 5: These specifications apply for all supply voltages from a single
5V to ±15V, the entire input voltage range, and for both high and low
output states. The high state is ISINK = 100A, VOUT = (V+ – 1V) and
the low state is ISINK = 8mA, VOUT = 0.8V. Therefore, this specification
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = ±15V, VCM = 0V, RS = 0Ω, VGND = –15V, output at pin 7 unless
otherwise noted.
SYMBOL PARAMETER
CONDITIONS
LT1011AC/AI/AM
LT1011C/I/M
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
VOS
Input Offset Voltage
(Note 4)
●
0.3
0.5
1
0.6
1.5
3
mV
*Input Offset Voltage
RS ≤ 50k (Note 5)
●
0.75
1.5
2
3
mV
IOS
*Input Offset Current
(Note 5)
●
0.2
3
5
0.2
4
6
nA
IB
Input Bias Current
(Note 4)
15
25
20
50
nA
*Input Bias Current
(Note 5)
●
20
35
50
25
65
80
nA
VOS
T
Input Offset Voltage Drift
(Note 6)
TMIN ≤ T ≤ TMAX
●
4
15
4
25
V/°C
AVOL
*Large-Signal Voltage Gain
RL = 1k Connected to 15V,
–10V ≤ VOUT ≤ 14.5V
200
500
200
500
V/mV
RL = 500Ω Connected to 5V,
VS = Single 5V, VGND = 0V,
0.5V ≤ VOUT ≤ 4.5V
50
300
50
300
V/mV
CMRR
Common Mode Rejection Ratio
94
115
90
115
dB
*Input Voltage Range (Note 9)
VS = ±15V
VS = Single 5V
●
–14.5
0.5
13
3
–14.5
0.5
13
3
V
tD
*Response Time
(Note 7)
150
250
150
250
ns
VOL
*Output Saturation Voltage,
VGND = 0
VIN = –5mV, ISINK = 8mA, TJ ≤ 100°C
VIN = –5mV, ISINK = 8mA
VIN = –5mV, ISINK = 50mA
●
0.25
0.7
0.4
0.45
1.5
0.25
0.7
0.4
0.45
1.5
V
*Output Leakage Current
VIN = 5mV, VGND = –15V,
VOUT = 20V
●
0.2
10
500
0.2
10
500
nA
*Positive Supply Current
VGND = 0
3.2
4
3.2
4
mA
*Negative Supply Current
VGND = 0
1.7
2.5
1.7
2.5
mA
*Strobe Current (Note 8)
Minimum to Ensure Output Transistor is Off,
VGND = 0
500
A
Input Capacitance
6
pF
*Indicates parameters which are guaranteed for all supply voltages, including a single 5V supply. See Note 5.
defines a worst-case error band that includes effects due to common
mode signals, voltage gain and output load.
Note 6: Drift is calculated by dividing the offset voltage difference
measured at min and max temperatures by the temperature difference.
Note 7: Response time is measured with a 100mV step and 5mV
overdrive. The output load is a 500Ω resistor tied to 5V. Time
measurement is taken when the output crosses 1.4V.
Note 8: Do not short the STROBE pin to ground. It should be current
driven at 3mA to 5mA for the shortest strobe time. Currents as low
as 500A will strobe the LT1011A if speed is not important. External
leakage on the STROBE pin in excess of 0.2A when the strobe is “off”
can cause offset voltage shifts.
Note 9: See graph “Input Offset Voltage vs Common Mode Voltage.”
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