The offset voltage specified for VS = ±15V, V<" />
參數(shù)資料
型號: LT1010CN8
廠商: Linear Technology
文件頁數(shù): 20/20頁
文件大?。?/td> 0K
描述: IC BUFFER HI-SPEED 150MA 8-DIP
標準包裝: 50
放大器類型: 緩沖器
電路數(shù): 1
轉換速率: 75 V/µs
增益帶寬積: 20MHz
電流 - 輸入偏壓: 500µA
電流 - 電源: 5mA
電流 - 輸出 / 通道: 150mA
電壓 - 電源,單路/雙路(±): 4.5 V ~ 40 V,±2.25 V ~ 20 V
工作溫度: 0°C ~ 100°C
安裝類型: 通孔
封裝/外殼: 8-DIP(0.300",7.62mm)
供應商設備封裝: 8-PDIP
包裝: 管件
LT1010
9
1010fe
APPLICATIONS INFORMATION
The offset voltage specified for VS = ±15V, VIN = 0V and
TA = 25°C will suffice for a worst-case condition.
At lower frequencies, the buffer is within the feedback loop
so that its offset voltage and gain errors are negligible. At
higher frequencies, feedback is through CF, so that phase
shift from the load capacitance acting against the buffer
output resistance does not cause loop instability.
Stability depends upon the RFCF time constant or the
closed-loop bandwidth. With an 80kHz bandwidth, ring-
ing is negligible for CL = 0.068F and damps rapidly for
CL = 0.33F. The pulse response is shown in the graph.
A1
LT1010
VIN
V
A2
LT1010
V+
IS
IOUT
IS + IOUT
IS – IOUT
VOUT
1010 AI03
IS
Output load current will be divided based on the output
resistance of the individual buffers. Therefore, the avail-
able output current will not quite be doubled unless output
resistances are matched. As for offset voltage, the 25°C
limits should be used for worst-case calculations.
Parallel operation is not thermally unstable. Should one
unit get hotter than its mates, its share of the output and
its standby dissipation will decrease.
As a practical matter, parallel connection needs only some
increased attention to heat sinking. In some applications,
a few ohms equalization resistance in each output may be
wise.Onlythemostdemandingapplicationsshouldrequire
matching, and then just of output resistance at 25°C.
Isolating Capacitive Loads
The inverting amplifier below shows the recommended
method of isolating capacitive loads. Noninverting ampli-
fiers are handled similarly.
A2
LT1010
RS
RF
20k
VIN
CF
100pF
CL
1010 AI04
VOUT
+
A1
LT1007
TIME (s)
0
OUTPUT
VOLTAGE
(V)
0
200
1010 AI05
0
50
100
150
5
–5
5
CL = 0.068F
CL = 0.33F
Pulse Response
Small-signalbandwidthisreducedbyCF,butconsiderable
isolation can be obtained without reducing it below the
powerbandwidth.Often,abandwidthreductionisdesirable
to filter high frequency noise or unwanted signals.
A2
LT1010
RF
2k
RS
2k
VIN
CF
1nF
CL
1010 AI06
VOUT
+
A1
LT118A
The follower configuration is unique in that capacitive
load isolation is obtained without a reduction in small-
signal bandwidth, although the output impedance of the
buffer comes into play at high frequencies. The precision
unity-gain buffer above has a 10MHz bandwidth without
capacitive loading, yet it is stable for all load capacitance
to over 0.3F, again determined by RFCF.
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