參數(shù)資料
型號(hào)： LT1007MH
廠商： LINEAR TECHNOLOGY CORP
元件分類： 運(yùn)動(dòng)控制電子
英文描述： BACKPLANE VME J1/J2 7-SLOT MONO
中文描述： OP-AMP, 160 uV OFFSET-MAX, 8 MHz BAND WIDTH, MBCY8
封裝： METAL CAN, TO-5, 8 PIN
文件頁數(shù)： 4/16頁
文件大?。?/td> 365K
代理商： LT1007MH
4
LT1007/LT1037
ELECTRICAL CHARACTERISTICS
V
S
=
±
15V, –40
°
C
≤
T
A
≤
85
°
C, unless otherwise noted.
V
S
=
±
15V, –55
°
C
≤
T
A
≤
125
°
C, unless otherwise noted.
LT1007I/LT1037I
MIN
TYP
40
0.3
SYMBOL
V
OS
V
OS
Temp
I
OS
I
B
PARAMETER
Input Offset Voltage
Average Input Offset Drift
CONDITIONS
(Note 1)
(Note 9)
MAX
125
1.0
UNITS
G
μ
V
G
μ
V/
°
C
Input Offset Current
Input Bias Current
Input Voltage Range
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Large-Signal Voltage Gain
G
20
±
25
±
11.7
120
120
15.0
12.0
±
13.6
95
80
±
90
nA
nA
V
dB
dB
G
G
±
10
105
101
2.0
1.5
±
12.0
CMRR
PSRR
A
VOL
V
CM
=
±
10.5V
V
S
=
±
4.5V to
±
18V
R
L
≥
2k, V
O
=
±
10V
R
L
≥
1k, V
O
=
±
10V
R
L
≥
2k
G
G
G
G
V/
μ
V
V/
μ
V
V
OUT
P
D
Maximum Output Voltage Swing
Power Dissipation
G
V
G
165
mW
LT1007AM/LT1037AM LT1007M/LT1037M
MIN
TYP
MAX
25
60
0.2
0.6
SYMBOL
V
OS
V
OS
Temp
I
OS
I
B
PARAMETER
Input Offset Voltage
Average Input Offset Drift
CONDITIONS
(Note 1)
(Note 9)
MIN
TYP
50
0.3
MAX
160
1.0
UNITS
G
μ
V
G
μ
V/
°
C
Input Offset Current
Input Bias Current
Input Voltage Range
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Large-Signal Voltage Gain
G
15
±
20
±
11.5
126
126
14.0
10.0
±
13.5
100
50
±
60
20
±
35
±
11.5
120
120
14.0
10.0
±
13.5
100
85
±
95
nA
nA
V
dB
dB
G
G
±
10.3
112
104
3.0
2.0
±
12.5
±
10.3
104
100
2.0
1.5
±
12.0
CMRR
PSRR
A
VOL
V
CM
=
±
10.3V
V
S
=
±
4.5V to
±
18V
R
L
≥
2k, V
O
=
±
10V
R
L
≥
1k, V
O
=
±
10V
R
L
≥
2k
G
G
G
G
V/
μ
V
V/
μ
V
V
OUT
P
D
Maximum Output Voltage Swing
Power Dissipation
G
V
G
150
170
mW
The
G
denotes the specifications which apply over the full operating
temperature range.
For MIL-STD components, please refer to LTC 883C data sheet for test
listing and parameters.
Note 1:
Input Offset Voltage measurements are performed by automatic
test equipment approximately 0.5 seconds after application of power. AM
and AC grades are guaranteed fully warmed up.
Note 2:
Long Term Input Offset Voltage Stability refers to the average
trend line of Offset Voltage vs Time over extended periods after the first 30
days of operation. Excluding the initial hour of operation, changes in V
OS
during the first 30 days are typically 2.5
μ
V. Refer to typical performance
curve.
Note 3:
This parameter is tested on a sample basis only.
Note 4:
10Hz noise voltage density is sample tested on every lot. Devices
100% tested at 10Hz are available on request.
Note 5:
See the test circuit and frequency response curve for 0.1Hz to
10Hz tester in the Applications Information section.
Note 6:
See the test circuit for current noise measurement in the
Applications Information section.
Note 7:
This parameter is guaranteed by design and is not tested.
Note 8:
The inputs are protected by back-to-back diodes. Current limiting
resistors are not used in order to achieve low noise. If differential input
voltage exceeds
±
0.7V, the input current should be limited to 25mA.
Note 9:
The Average Input Offset Drift performance is within the
specifications unnulled or when nulled with a pot having a range of 8k
to
20k
.
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