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參數(shù)資料
| 型號(hào)： | LSP3121D12E |
| 廠商： | LITE-ON SEMICONDUCTOR CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | SWITCHING REGULATOR, PSSO5 |
| 封裝： | TO-252, 5 PIN |
| 文件頁(yè)數(shù)： | 8/8頁(yè) |
| 文件大?。?/td> | 142K |
| 代理商： | LSP3121D12E |
Symbol
Parameter
Conditions
Typ
LM1575-XX
LM2575-XX
Units
(Limits)
LM2575HV-XX
Limit
(Note 2)
(Note 3)
θ
JA
Thermal Resistance
T Package, Junction to Ambient (Note 9)
65
θ
JA
T Package, Junction to Ambient (Note 10)
45
°C/W
θ
JC
T Package, Junction to Case
2
θ
JA
N Package, Junction to Ambient (Note 11)
85
θ
JA
M Package, Junction to Ambient (Note 11)
100
θ
JA
S Package, Junction to Ambient (Note 12)
37
ON /OFF CONTROL Test Circuit
V
IH
ON /OFF Pin Logic
V
OUT = 0V
1.4
2.2/2.4
V(Min)
V
IL
Input Level
V
OUT = Nominal Output Voltage
1.2
1.0/0.8
V(Max)
I
IH
ON /OFF Pin Input
ON /OFF Pin = 5V (OFF)
12
μA
Current
30
μA(Max)
I
IL
ON /OFF Pin = 0V (ON)
0
μA
10
μA(Max)
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics.
Note 2:
All limits guaranteed at room temperature (standard type face) and at temperature extremes (bold type face). All limits are used to calculate Average
Outgoing Quality Level, and all are 100% production tested.
Note 3:
All limits guaranteed at room temperature (standard type face) and at temperature extremes (bold type face). All room temperature limits are 100%
production tested. All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods.
Note 4:
External components such as the catch diode, inductor, input and output capacitors can affect switching regulator system performance. When the LM1575/
LM2575 is used as shown in the Figure 2 test circuit, system performance will be as shown in system parameters section of Electrical Characteristics.
Note 5:
Output (pin 2) sourcing current. No diode, inductor or capacitor connected to output pin.
Note 6:
Feedback (pin 4) removed from output and connected to 0V.
Note 7:
Feedback (pin 4) removed from output and connected to +12V for the Adjustable, 3.3V, and 5V versions, and +25V for the 12V and 15V versions, to
force the output transistor OFF.
Note 8:
V
IN = 40V (60V for the high voltage version).
Note 9:
Junction to ambient thermal resistance (no external heat sink) for the 5 lead TO-220 package mounted vertically, with inch leads in a socket, or on a
PC board with minimum copper area.
Note 10:
Junction to ambient thermal resistance (no external heat sink) for the 5 lead TO-220 package mounted vertically, with inch leads soldered to a PC
board containing approximately 4 square inches of copper area surrounding the leads.
Note 11:
Junction to ambient thermal resistance with approximately 1 square inch of pc board copper surrounding the leads. Additional copper area will lower
thermal resistance further. See thermal model in Switchers made Simple software.
Note 12:
If the TO-263 package is used, the thermal resistance can be reduced by increasing the PC board copper area thermally connected to the package:
Using 0.5 square inches of copper area,
θ
JA is 50°C/W; with 1 square inch of copper area, θJA is 37°C/W; and with 1.6 or more square inches of copper area,
θ
JA is 32°C/W.
Note 13:
The oscillator frequency reduces to approximately 18 kHz in the event of an output short or an overload which causes the regulated output voltage to
drop approximately 40% from the nominal output voltage. This self protection feature lowers the average power dissipation of the IC by lowering the minimum
duty cycle from 5% down to approximately 2%.
Note 14:
Refer to RETS LM1575J for current revision of military RETS/SMD.
www.national.com
8
LM1575/LM2575/LM2575HV
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