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參數(shù)資料
| 型號(hào)： | LSM2-T/6-D12G-C |
| 元件分類： | 電源模塊 |
| 英文描述： | 1-OUTPUT 19.8 W DC-DC REG PWR SUPPLY MODULE |
| 封裝： | ROHS COMPLIANT |
| 文件頁(yè)數(shù)： | 12/17頁(yè) |
| 文件大小： | 1394K |
| 代理商： | LSM2-T/6-D12G-C |
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LSM2 Series
Single Output, Non-isolated, Selectable-Output POL DC/DC Converters
MDC_LSM2_A01 Page 4 of 7
P O W E R E L E C T R O N I C S D I V I S I O N
D C / D C C O N V E R T E R S
www.cd4power.com
Performance/Functional Specification Notes:
()
All models are tested and specified with external || 0F ceramic/tantalum output capacitors
and a 22F external input capacitor. All capacitors are low ESR types. These capacitors are
necessary to accommodate our test equipment and may not be required to achieve specified
performance in your applications. All models are stable and regulate within spec under no-load
conditions.
General conditions for Specifications are +25°C, VIN = nominal, VOUT = nominal, full load. “Nomi-
nal” output voltage is +5V for D2 models and +3.3V for W3 models.
(2)
Input Back Ripple Current is tested and specified over a 5-20MHz bandwidth. Input filtering is CIN
= 2 x 00F tantalum, CBUS = 000F electrolytic, LBUS = H.
(3)
Note that Maximum Power Derating curves indicate an average current at nominal input voltage.
At higher temperatures and/or lower airflow, the DC/DC converter will tolerate brief full current
outputs if the total RMS current over time does not exceed the derating curve.
(4)
Mean Time Before Failure is calculated using the Telcordia (Belcore) SR-332 Method , Case 3,
ground fixed conditions, TPCBOARD = +25°C, full output load, natural air convection.
(5)
The On/Off Control may be driven with external logic or by applying appropriate external voltages
which are referenced to –Input Common. The On/Off Control Input should use either an open
collector/open drain transistor or logic gate which does not exceed +VIN. A 68K
W external pullup
resistor to +VIN will cause the “ON” state for negative logic models.
(6)
Short circuit shutdown begins when the output voltage degrades approximately 2% from the
selected setting.
(7)
If Sense is connected remotely at the load, up to 0.5 Volts difference is allowed between the
Sense and +VOUT pins to compensate for ohmic voltage drop in the power lines. A larger voltage
drop may cause the converter to exceed maximum power dissipation.
I/O Filtering and Noise Reduction
All models in the LSM2 Series are tested and specified with external
|| 0F ceramic/tantalum output capacitors and a 22F tantalum input ca-
pacitor. These capacitors are necessary to accommodate our test equipment
and may not be required to achieve desired performance in your application.
The LSM2's are designed with high-quality, high-performance internal I/O
caps, and will operate within spec in most applications with no additional
external components.
In particular, the LSM2's input capacitors are specified for low ESR and are
fully rated to handle the units' input ripple currents. Similarly, the internal out-
put capacitors are specified for low ESR and full-range frequency response.
In critical applications, input/output ripple/noise may be further reduced using
filtering techniques, the simplest being the installation of external I/O caps.
External input capacitors serve primarily as energy-storage devices. They
minimize high-frequency variations in input voltage (usually caused by IR
drops in conductors leading to the DC/DC) as the switching converter draws
pulses of current. Input capacitors should be selected for bulk capacitance
(at appropriate frequencies), low ESR, and high rms-ripple-current ratings.
The switching nature of modern DC/DC's requires that the dc input voltage
source have low ac impedance at the frequencies of interest. Highly inductive
source impedances can greatly affect system stability. Your specific system
configuration may necessitate additional considerations.
Output ripple/noise (also referred to as periodic and random deviations or
PARD) may be reduced below specified limits with the installation of additional
external output capacitors. Output capacitors function as true filter elements
and should be selected for bulk capacitance, low ESR, and appropriate fre-
quency response. Any scope measurements of PARD should be made directly
at the DC/DC output pins with scope probe ground less than 0.5" in length.
All external capacitors should have appropriate voltage ratings and be located
as close to the converters as possible. Temperature variations for all relevant
parameters should be taken into consideration.
TECHNICAL NOTES
(8)
Output noise may be further reduced by adding an external filter. See I/O Filtering and Noise
Reduction.
(9)
All models are fully operational and meet published specifications, including “cold start” at
–40°C.
(0)
Regulation specifications describe the deviation as the line input voltage or output load current is
varied from a nominal midpoint value to either extreme.
()
Other input or output voltage ranges are available under scheduled quantity special order.
(2)
Maximum PC board temperature is measured with the sensor in the center.
(3)
Do not exceed maximum power specifications when adjusting the output trim.
(4)
The maximum output capacitive loads depend on the the Equivalent Series Resistance (ESR) of
the external output capacitor.
(5)
Do not use Pre-bias startup and sequencing together. See Technical Notes below.
(6)
After short circuit shutdown, if the load is partially removed such that the load still exceeds the
overcurrent (OC) detection, the converter will remain in hiccup restart mode.
(7)
When Sequencing is not used, the Power Good output is TRUE at any time the output is within
approximately ±0% of the voltage set point. Power Good basically indicates if the converter is
in regulation. Power Good detects Over Temperature if the PWM has shut down due to OT. Power
Good does not directly detect Over Current.
If Sequencing is in progress, Power Good will falsely indicate TRUE (valid) before the output
reaches its setpoint. Ignore Power Good if Sequencing is in transition.
The most effective combination of external I/O capacitors will be a function
of your line voltage and source impedance, as well as your particular load
and layout conditions. Our Applications Engineers can recommend potential
solutions and discuss the possibility of our modifying a given device’s internal
filtering to meet your specific requirements. Contact our Applications Engineer-
ing Group for additional details.
Input Fusing
Most applications and or safety agencies require the installation of fuses at
the inputs of power conversion components. The LSM2 Series are not inter-
nally fused. Therefore, if input fusing is mandatory, either a normal-blow or a
fast-blow fuse with a value no greater than twice the maximum input current
should be installed within the ungrounded input path to the converter.
As a rule of thumb however, we recommend to use a normal-blow or slow-
blow fuse with a typical value of about twice the maximum input current,
calculated at low line with the converter's minimum efficiency.
Safety Considerations
LSM2 SMT's are non-isolated DC/DC converters. In general, all DC/DC's
must be installed, including considerations for I/O voltages and spacing/sepa-
ration requirements, in compliance with relevant safety-agency speci-
fications (usually UL/IEC/EN60950).
In particular, for a non-isolated converter's output voltage to meet SELV (safety
extra low voltage) requirements, its input must be SELV compliant.
If the output needs to be ELV (extra low voltage), the input must be ELV.
Input Overvoltage and Reverse-Polarity Protection
LSM2 SMT Series DC/DC's do not incorporate either input overvoltage or input
reverse-polarity protection. Input voltages in excess of the specified absolute
maximum ratings and input polarity reversals of longer than "instantaneous"
duration can cause permanent damage to these devices.
Start-Up Time
The VIN to VOUT Start-Up Time is the interval between the time at which a
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| LSM2T6W3C | 制造商:MURATA 功能描述:Pb Free |
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