參數(shù)資料
型號: LSIFC929XL
廠商: LSI CORP
元件分類: 微控制器/微處理器
英文描述: 2 CHANNEL(S), 2G bps, FDDI CONTROLLER, PBGA456
封裝: 35 X 35 MM, 1.27 MM PITCH, PLASTIC, MO-151, BGA-456
文件頁數(shù): 6/156頁
文件大?。?/td> 1488K
代理商: LSIFC929XL
PCI I/O Space and Memory Space Register Description
6-33
Copyright 2003-2005 by LSI Logic Corporation. All rights reserved.
Table 6.8 denes the PCI Memory Space [1] address map.
A bit-level description of the PCI Memory and PCI I/O spaces follows.
Register: 0x00
System Doorbell
Read/Write
This register is a simple message passing mechanism that allows the
system to pass single word messages to the embedded IOP processor
and vice versa. There is a unique system doorbell for each PCI function.
When a host system PCI master writes to the Host Registers
→ Doorbell
register, the LSIFC929XL generates a maskable interrupt to the IOP. The
value written by the host system is available for the IOP to read in the
System Interface Registers
→ Doorbell register. The IOP clears the
interrupt status after reading the value.
Conversely, when the IOP processor writes to the System Interface
Registers
→ Doorbell register, the LSIFC929XL generates a maskable
interrupt to the PCI system. The host system can read the value written
by the IOP in the Host Registers
→ Doorbell register. The host system
clears the interrupt status bit and interrupt pin by writing any value to the
Host Registers
→ Interrupt Status register.
Host Doorbell Value
[31:0]
During a write, this register contains the doorbell value
that the host system passes to the IOP. During a read,
this register contains the doorbell value that the IOP
passes to the host system.
Table 6.8
PCI Memory [1] Address Map
31
16 15
0
Diagnostic Memory
0x00–
0x(Sizeof(Mem1)
1)
31
24 23
16 15
8
7
0
System Doorbell
00000000000000000000000000000000
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