參數(shù)資料
型號: LSI53C770
英文描述: LSI53C770 Ultra SCSI I/O Processor technical manual v2.1 3/01
中文描述: LSI53C770超的SCSI I / O處理器技術(shù)手冊2.1 3 / 01
文件頁數(shù): 153/166頁
文件大?。?/td> 1330K
代理商: LSI53C770
Data Transfers
A-7
The board-reset push button is located in the upper left-hand corner of
the board. Immediately to the right of the reset button, is the switch SW2.
This switch controls the hardware address of the ISA bus.
Table A.5
specifies the state of the switches relative to the address:
The LSI53C040 board contains 4 serial EEPROMS, two on each bus,
that can be used for firmware. The jumpers located in the bottom center
of the board specify the bus number and the chip address of the serial
EEPROM whose code will be executed upon a reset. For all jumpers, the
state is 1 if the top two pins are connected and 0 if the bottom two pins
are connected.
Note1:
The Chip address is (JP8 JP9 JP6) <<1, so a setting of 111
becomes 0b1110 = 0x0E.
Note2:
The default settings for the board have serial EEPROMS on
bus 1 and bus 0 at addresses 6 and E.
Table A.5
Switch Controls and Address
Switch 1
Switch 2
Address
On
On
0xF000
Off
On
0xE000
On
Off
0xD000
Off
Off
0xC000
Table A.6
Jumpers and Chip Address
JP8
JP5
JP6
Chip Address
1
1
1
E
0
1
1
6
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