參數(shù)資料
型號(hào): LSI53C1510
英文描述: LSI53C1510 I2O-Ready PCI RAID Ultra2 SCSI Controller technical manual v2.2 4/01
中文描述: LSI53C1510 I2O的PCI陣列Ultra2 SCSI控制器的技術(shù)手冊(cè)2.2版4 / 01
文件頁(yè)數(shù): 24/166頁(yè)
文件大?。?/td> 1330K
代理商: LSI53C1510
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2-8
General Design Considerations
not require much SCSI traffic. Therefore, the LSI53C040 is an excellent
choice for enclosure monitoring functions, although attention to certain
software details is necessary to make effective use of its features.
2.3 SCSI and DMA
The most important of those details is the SCSI interface. The DMA
engine in the LSI53C040 helps improve the overall speed of the SCSI
interface, but that alone is not enough. Because this core is relatively
slow, the software is designed to complete the SCSI work as quickly as
possible.
The SCSI interface is done at interrupt level. The 8032 has 6 interrupt
sources, but only two interrupt levels. SCSI is done at the lower interrupt
level, while DMA is done at the higher interrupt level. This is necessary
because the 8032 is placed in a low power mode during DMA, and the
DMA interrupt is used to “wake up” the 8032 when DMA is completed.
Note:
The 8032 must be placed in low power mode so that it is
not executing instructions; that is, the 8032 cannot run
while the DMA machine is running.
DMA must be done to complete the SCSI work. Since the SCSI code is
running at interrupt level and since there are only two interrupt levels, the
SCSI interrupt must be a low level interrupt, and the DMA must be a high
level interrupt.
The SCSI code is designed to be able to supply command responses
immediately after commands are received, so there is no delay between
the time a command is received and the time the response is sent. This
feature makes efficient use of the SCSI bus and of the slower LSI53C040
core. It also means that the SCSI code does not need to disconnect from
the initiator/host after the command is received, and then reconnect after
the data is ready to send, minimizing the overall time spent on the SCSI
bus. This is necessary because the LSI53C040 sees only 3 bits of the
high SCSI bus (not all 8 bits), so the LSI53C040 cannot arbitrate for the
bus to perform the reconnection/reselection whenever the LSI53C040 is
placed at a high SCSI ID [15:8]. The LSI53C040 could disconnect and
reconnect if it were placed at a low ID [7:0], but that would place
unwanted restrictions on the general use of this code.
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