參數(shù)資料
型號： LSI53C1010-66
英文描述： LSI53C1010-66 PCI to Dual Channel Ultra160 SCSI Multifunction Controller technical manual v2.1 2/01
中文描述： LSI53C1010 - 66 PCI到雙通道Ultra160 SCSI多功能控制器的技術(shù)手冊2.1 2月1日
文件頁數(shù)： 98/166頁
文件大?。?/td> 1330K
代理商： LSI53C1010-66
3-50
SAF-TE Source Code
How do we change the flags used
during compilation
Currently, the source code #Define statements must be
modified.
How are SCSI errors reported
Errors during a SCSI transfer or with a CDB are reported
by setting the appropriate check condition. Refer to Section
2.1.3 in the
LSI53C040 Enclosure Services Processor
SAF-TE Firmware User's Guide
for more information.
How are TWS errors reported
Invalid entries in
config
data structure, code load status
variable cl_status are set to CLS_FAILURE_XXX. The XXX
describes the failure and thus check conditions are set. The
initiator may retrieve information by issuing a Mode 4 Write
Buffer command with CDB[3] = 0xFF followed by a Request
Sense command.
Is Timer 2 utilized
Yes. Timer 2 is used to clock the transmission and
reception of data on the serial bus.
What is the difference between a soft
reset and a hard reset
A hard reset is a power on reset. The chip, all registers,
and external data memory are initialized using the contents
of the serial EEPROM. A soft reset occurs when the
watchdog timer expires. This forces only a chip reset. Note
the code restarts but not all of the registers are initialized.
See Chapter 2 in the
LSI53C040 Enclosure Services
Processor Technical Manual
for more information.
What is a shadow register and how is
it used
It holds a duplicate of a register value in xdata data
memory. Use of shadow registers allows for faster access
in some cases.
Prior to transferring the data sent by a
Mode 4 Write Buffer command over
the TWS bus, the byte count variable is
decremented by 1. Why
All Mode 4 Write Buffer commands require that the last
data byte transferred be the checksum of all previous data
bytes. However, this checksum is
not
data to be saved in
the serial EEPROM.
If the firmware is, say 10 Kbytes, but
our SCSI data buffer is only 1025
Bytes, how is the firmware updated
The Initiator, or an application program, must break the
firmware into segments and write one segment at a time.
See the discussion on
Section 3.4.2.3, “Firmware Update,”
page 3-33
for more information.
Table 3.18
Source Code Issues (Cont.)
Question
Comment
相關(guān)PDF資料
PDF描述
LSI53CF92A(64PQFP) Controller Miscellaneous - Datasheet Reference
LSI53CF92A(64TQFP) Controller Miscellaneous - Datasheet Reference
LSI53C1010R LSI53C1010R Ultra160 SCSI controller
LSI53C1020 LSI53C1020 PCI-X to Ultra320 SCSI Controller technical manual v2.0 6/02
LSI53C1030 LSI53C1030 PCI-X to Dual Channel Ultra320 SCSI Multifunction Controller technical manual v2.0 5/02
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LSI53C1010-66-LEADFREE 制造商:LSI Corporation 功能描述:
LSI53C1010R 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LSI53C1010R Ultra160 SCSI controller
LSI53C1020 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LSI53C1020 PCI-X to Ultra320 SCSI Controller technical manual v2.0 6/02
LSI53C1020A384BGALEADFREE 制造商:LSI Corporation 功能描述:
LSI53C1030 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LSI53C1030 PCI-X to Dual Channel Ultra320 SCSI Multifunction Controller technical manual v2.0 5/02
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