參數(shù)資料
型號(hào): LSI53C1010-33
英文描述: LSI53C1010-33 PCI to Dual Channel Ultra160 SCSI Multifunction Controller technical manual v3.2 2/01
中文描述: LSI53C1010 - 33 PCI到雙通道Ultra160 SCSI多功能控制器的技術(shù)手冊(cè)v3.2版2月1日
文件頁數(shù): 84/166頁
文件大?。?/td> 1330K
代理商: LSI53C1010-33
3-36
SAF-TE Source Code
The upper byte of the write address is utilized as a flag for the SAF-TE
firmware. The choices for the upper byte and the corresponding actions
are shown in
Table 3.12
.
To update the SAF-TE firmware, the Initiator is required to send the
following series of Mode 4 Write Buffer SCSI commands to the Target:
CDB[3] = 0 to update the firmware
CDB[3] = 0xFF to determine if an error has occurred
CDB[3] = 0xFE to update the Flash ROM tables
CDB[3] = 0xFD to reset the LSI53C040 chip.
Additionally, a Request Sense should be issued after the Write Buffer
with CDB[3] = 0xFF to verify that the upload was successful.
Remark:
The SAF-TE firmware allows transfers of, at most, 1 Kbyte
(Tag CODE_BUFFER_SIZE) per SCSI call. However, the
firmware itself will always be between 1 Kbyte and
12 Kbytes in size. Therefore, the Initiator issues a
sequence of Mode 4 Write Buffer commands each time the
firmware is updated.
Pseudo-code for a firmware upload is shown below where
firmware_size
is the size of the firmware to be loaded (in bytes) and
Table 3.12
Upper Byte Choices
CDB[3] Value
Action
0x00
If
cl_status
not idle, set check condition for code load
busy. If CDB invalid, set check condition for invalid
CDB. Else, set
cl_status
to busy, set
cl_byte_count,
and populate
code_buffer
with data transmitted from
Initiator.
0xFD
If
cl_status
not idle, set check condition for code load
busy. Else, set
cl_status
to busy and set
cl_byte_count
to CLBC_REBOOT.
0xFE
If
cl_status
not idle, set check condition for code load
busy. Else, set
cl_status
to busy and set
cl_byte_count
to CLBC_UPDATE_STRUCTURE.
0xFF
Set check condition based on value of
cl_status
. If
cl_status
other than in Idle or Busy states, reset to Idle
state.
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參數(shù)描述
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