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參數(shù)資料
| 型號： | LRS1808A |
| 英文描述： | Flash ROM |
| 中文描述： | 閃存ROM |
| 文件頁數(shù)： | 10/45頁 |
| 文件大?。?/td> | 1382K |
| 代理商： | LRS1808A |
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LRS1806A
8
5. Command Definitions for Flash Memory
(11)
5.1 Command Definitions
Notes:
1. Bus operations are defined in 3.1 Bus Operation.
2. The address which is written at the first bus cycle should be the same as the address which is written at the second bus
cycle.
X=Any valid address within the device.
PA=Address within the selected partition.
IA=Identifier codes address (See 5.2 Identifier Codes for Read Operation).
QA=Query codes address. Refer to the LH28F320BF, LH28F640BF, LH28F128BF series Appendix for details.
BA=Address within the block being erased, set/cleared block lock bit or set block lock-down bit.
WA=Address of memory location for the Program command or the first address for the Page Buffer Program command.
PCRC=Partition configuration register code presented on the address A
0
-A
15
.
3. ID=Data read from identifier codes (See 5.2 Identifier Codes for Read Operation).
QD=Data read from query database. Refer to the LH28F320BF, LH28F640BF, LH28F128BF series Appendix for details.
SRD=Data read from status register. See 6. Status Register Definition for a description of the status register bits.
WD=
Data to be programmed at location WA. Data is latched on the rising edge of F-WE or F-CE (whichever goes high first).
N-1=N is the number of the words to be loaded into a page buffer.
4. Following the Read Identifier Codes command, read operations access manufacturer code, device code, block lock
configuration code, partition configuration register code (See 5.2 Identifier Codes for Read Operation).
The Read Query command is available for reading CFI (Common Flash Interface) information.
5. Block erase, full chip erase or (page buffer) program cannot be executed when the selected block is locked. Unlocked
block can be erased or programmed when F-RST is V
IH
.
6. Either 40H or 10H are recognized by the CUI (Command User Interface) as the program setup.
7. Following the third bus cycle, inputs the program sequential address and write data of “N” times. Finally, input the any
valid address within the target partition to be programmed and the confirm command (D0H). Refer to the LH28F320BF,
LH28F640BF, LH28F128BF series Appendix for details.
Command
Bus
Cycles
Req’d
1
≥
2
≥
2
2
1
Notes
First Bus Cycle
Second Bus Cycle
Oper
(1)
Address
(2)
Data
(3)
Oper
(1)
Address
(2)
Data
(3)
Read Array
Read Identifier Codes
2
Write
Write
PA
PA
FFH
90H
2,3,4
Read
IA
ID
Read Query
Read Status Register
Clear Status Register
2,3,4
2,3
2
Write
Write
Write
PA
PA
PA
98H
70H
50H
Read
Read
QA
PA
QD
SRD
Block Erase
Full Chip Erase
2
2
2,3,5
2,5,9
Write
Write
BA
X
20H
30H
40H or
10H
Write
Write
BA
X
D0H
D0H
Program
2
2,3,5,6
Write
WA
Write
WA
WD
Page Buffer Program
Block Erase and (Page Buffer)
Program Suspend
Block Erase and (Page Buffer)
Program Resume
≥
4
2,3,5,7
Write
WA
E8H
Write
WA
N-1
1
2,8,9
Write
PA
B0H
1
2,8,9
Write
PA
D0H
Set Block Lock Bit
Clear Block Lock Bit
Set Block Lock-down Bit
2
2
2
2
Write
Write
Write
BA
BA
BA
60H
60H
60H
Write
Write
Write
BA
BA
BA
01H
D0H
2FH
2,10
2
Set Partition Configuration
Register
2
2,3
Write
PCRC
60H
Write
PCRC
04H
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| LRS-200-12 | 功能描述:O/P +12V17A 制造商:mean well usa inc. 系列:LRS-200 零件狀態(tài):在售 類型:封閉式 輸出數(shù):1 電壓 - 輸入:90 ~ 132 VAC，180 ~ 264 VAC，240 ~ 370 VDC 電壓 - 輸出 1:12V 電壓 - 輸出 2:- 電壓 - 輸出 3:- 電壓 - 輸出 4:- 電流 - 輸出（最大值）:17A 功率（W）:204W 應(yīng)用:ITE（商業(yè)） 電壓 - 隔離:3kV 效率:87.5% 工作溫度:-25°C ~ 70°C（有降額） 特性:可調(diào)輸出，通用輸入 安裝類型:底座安裝 大小/尺寸:8.46" 長 x 4.53" 寬 x 1.18" 高（215.0mm x 115.0mm x 30.0mm） 所需最小負(fù)載:無 認(rèn)可:CB，cURus 標(biāo)準(zhǔn)包裝:1 |
| LRS-200-15 | 功能描述:O/P +15V14A 制造商:mean well usa inc. 系列:LRS-200 零件狀態(tài):在售 類型:封閉式 輸出數(shù):1 電壓 - 輸入:90 ~ 132 VAC，180 ~ 264 VAC，240 ~ 370 VDC 電壓 - 輸出 1:15V 電壓 - 輸出 2:- 電壓 - 輸出 3:- 電壓 - 輸出 4:- 電流 - 輸出（最大值）:14A 功率（W）:210W 應(yīng)用:ITE（商業(yè)） 電壓 - 隔離:3kV 效率:88% 工作溫度:-25°C ~ 70°C（有降額） 特性:可調(diào)輸出，通用輸入 安裝類型:底座安裝 大小/尺寸:8.46" 長 x 4.53" 寬 x 1.18" 高（215.0mm x 115.0mm x 30.0mm） 所需最小負(fù)載:無 認(rèn)可:CB，cURus 標(biāo)準(zhǔn)包裝:1 |
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